From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40442) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZhPpZ-0005c3-Po for qemu-devel@nongnu.org; Wed, 30 Sep 2015 18:26:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZhPpU-0005qk-S6 for qemu-devel@nongnu.org; Wed, 30 Sep 2015 18:26:33 -0400 Received: from mail.windriver.com ([147.11.1.11]:47492) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZhPpU-0005q3-Jy for qemu-devel@nongnu.org; Wed, 30 Sep 2015 18:26:28 -0400 From: Bill Paul Date: Wed, 30 Sep 2015 15:33:29 -0700 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201509301533.29564.wpaul@windriver.com> Subject: [Qemu-devel] [PATCH] Correctly re-init EFER state during INIT IPI List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Eduardo Habkost , Richard Henderson When doing a re-initialization of a CPU core, the default state is to _not_ have 64-bit long mode enabled. This means the LME (long mode enable) and LMA (long mode active) bits in the EFER model-specific register should be cleared. However, the EFER state is part of the CPU environment which is preserved by do_cpu_init(), so if EFER.LME and EFER.LMA were set at the time an INIT IPI was received, they will remain set after the init completes. This is contrary to what the Intel architecture manual describes and what happens on real hardware, and it leaves the CPU in a weird state that the guest can't clear. To fix this, the 'efer' member of the CPUX86State structure has been moved to an area outside the region preserved by do_cpu_init(), so that it can be properly re-initialized by x86_cpu_reset(). Signed-off-by: Bill Paul CC: Paolo Bonzini CC: Richard Henderson CC: Eduardo Habkost --- target-i386/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 034fab6..fac773c 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -833,6 +833,7 @@ typedef struct CPUX86State { BNDReg bnd_regs[4]; BNDCSReg bndcs_regs; uint64_t msr_bndcfgs; + uint64_t efer; /* Beginning of state preserved by INIT (dummy marker). */ struct {} start_init_save; @@ -865,7 +866,6 @@ typedef struct CPUX86State { uint32_t sysenter_cs; target_ulong sysenter_esp; target_ulong sysenter_eip; - uint64_t efer; uint64_t star; uint64_t vm_hsave; -- 1.8.0