* [Qemu-devel] [PATCH v5 0/2] spapr: generate DT node names
@ 2015-09-30 15:13 Laurent Vivier
2015-09-30 15:13 ` [Qemu-devel] [PATCH v5 1/2] PCI: add missing classes in pci_ids.h to build device tree Laurent Vivier
2015-09-30 15:13 ` [Qemu-devel] [PATCH v5 2/2] spapr: generate DT node names Laurent Vivier
0 siblings, 2 replies; 5+ messages in thread
From: Laurent Vivier @ 2015-09-30 15:13 UTC (permalink / raw)
To: qemu-ppc
Cc: Laurent Vivier, thuth, Michael S. Tsirkin, qemu-devel,
Alexander Graf, David Gibson
When DT node names for PCI devices are generated by SLOF,
they are generated according to the type of the device
(for instance, ethernet for virtio-net-pci device).
Node name for hotplugged devices is generated by QEMU.
This series adds the mechanic to QEMU to create the node
name according to the device type too.
v5: store subclass and iface ids as-is (int) and mask them when
we compare them.
v4: move pci_ids.h to a separate patch, fix PCI_CLASS_NETWORK_WORDFIP
remove duplicate NL, remove 386, 486 and alpha subclasses
rename "unknown-legacy-device", correctly check array size
add Thomas and Michael "Reviewed-by".
v3: use values from pci_ids.h, update pci_ids.h values
keep only details for USB (xhci, ohci, ...) and PIC (IO-APIC, IO-XAPIC)
v2: Use CamelCase name, remove misc-* name,
remove _OTHER entries to fallback to class name (as SLOF does).
Fix typo (IPMI-bltr).
Laurent Vivier (2):
PCI: add missing classes in pci_ids.h to build device tree
spapr: generate DT node names
hw/ppc/spapr_pci.c | 290 ++++++++++++++++++++++++++++++++++++++++++++---
include/hw/pci/pci_ids.h | 112 ++++++++++++++++--
2 files changed, 379 insertions(+), 23 deletions(-)
--
2.4.3
^ permalink raw reply [flat|nested] 5+ messages in thread* [Qemu-devel] [PATCH v5 1/2] PCI: add missing classes in pci_ids.h to build device tree 2015-09-30 15:13 [Qemu-devel] [PATCH v5 0/2] spapr: generate DT node names Laurent Vivier @ 2015-09-30 15:13 ` Laurent Vivier 2015-10-01 3:11 ` David Gibson 2015-09-30 15:13 ` [Qemu-devel] [PATCH v5 2/2] spapr: generate DT node names Laurent Vivier 1 sibling, 1 reply; 5+ messages in thread From: Laurent Vivier @ 2015-09-30 15:13 UTC (permalink / raw) To: qemu-ppc Cc: Laurent Vivier, thuth, Michael S. Tsirkin, qemu-devel, Alexander Graf, David Gibson To allow QEMU to add PCI entries in device tree, we must have a more exhaustive list of PCI class IDs. This patch synchronizes as much as possible with pci_ids.h and add some missing IDs from SLOF. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> --- include/hw/pci/pci_ids.h | 112 +++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 103 insertions(+), 9 deletions(-) diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h index d98e6c9..e27dc39 100644 --- a/include/hw/pci/pci_ids.h +++ b/include/hw/pci/pci_ids.h @@ -12,41 +12,84 @@ /* Device classes and subclasses */ -#define PCI_BASE_CLASS_STORAGE 0x01 -#define PCI_BASE_CLASS_NETWORK 0x02 +#define PCI_CLASS_NOT_DEFINED 0x0000 +#define PCI_CLASS_NOT_DEFINED_VGA 0x0001 +#define PCI_BASE_CLASS_STORAGE 0x01 #define PCI_CLASS_STORAGE_SCSI 0x0100 #define PCI_CLASS_STORAGE_IDE 0x0101 +#define PCI_CLASS_STORAGE_FLOPPY 0x0102 +#define PCI_CLASS_STORAGE_IPI 0x0103 #define PCI_CLASS_STORAGE_RAID 0x0104 +#define PCI_CLASS_STORAGE_ATA 0x0105 #define PCI_CLASS_STORAGE_SATA 0x0106 +#define PCI_CLASS_STORAGE_SAS 0x0107 #define PCI_CLASS_STORAGE_EXPRESS 0x0108 #define PCI_CLASS_STORAGE_OTHER 0x0180 +#define PCI_BASE_CLASS_NETWORK 0x02 #define PCI_CLASS_NETWORK_ETHERNET 0x0200 +#define PCI_CLASS_NETWORK_TOKEN_RING 0x0201 +#define PCI_CLASS_NETWORK_FDDI 0x0202 +#define PCI_CLASS_NETWORK_ATM 0x0203 +#define PCI_CLASS_NETWORK_ISDN 0x0204 +#define PCI_CLASS_NETWORK_WORLDFIP 0x0205 +#define PCI_CLASS_NETWORK_PICMG214 0x0206 #define PCI_CLASS_NETWORK_OTHER 0x0280 +#define PCI_BASE_CLASS_DISPLAY 0x03 #define PCI_CLASS_DISPLAY_VGA 0x0300 +#define PCI_CLASS_DISPLAY_XGA 0x0301 +#define PCI_CLASS_DISPLAY_3D 0x0302 #define PCI_CLASS_DISPLAY_OTHER 0x0380 +#define PCI_BASE_CLASS_MULTIMEDIA 0x04 +#define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 #define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 +#define PCI_CLASS_MULTIMEDIA_PHONE 0x0402 +#define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 +#define PCI_BASE_CLASS_MEMORY 0x05 #define PCI_CLASS_MEMORY_RAM 0x0500 +#define PCI_CLASS_MEMORY_FLASH 0x0501 +#define PCI_CLASS_MEMORY_OTHER 0x0580 -#define PCI_CLASS_SYSTEM_SDHCI 0x0805 -#define PCI_CLASS_SYSTEM_OTHER 0x0880 - -#define PCI_CLASS_SERIAL_USB 0x0c03 -#define PCI_CLASS_SERIAL_SMBUS 0x0c05 - +#define PCI_BASE_CLASS_BRIDGE 0x06 #define PCI_CLASS_BRIDGE_HOST 0x0600 #define PCI_CLASS_BRIDGE_ISA 0x0601 +#define PCI_CLASS_BRIDGE_EISA 0x0602 +#define PCI_CLASS_BRIDGE_MC 0x0603 #define PCI_CLASS_BRIDGE_PCI 0x0604 #define PCI_CLASS_BRIDGE_PCI_INF_SUB 0x01 +#define PCI_CLASS_BRIDGE_PCMCIA 0x0605 +#define PCI_CLASS_BRIDGE_NUBUS 0x0606 +#define PCI_CLASS_BRIDGE_CARDBUS 0x0607 +#define PCI_CLASS_BRIDGE_RACEWAY 0x0608 +#define PCI_CLASS_BRIDGE_PCI_SEMITP 0x0609 +#define PCI_CLASS_BRIDGE_IB_PCI 0x060a #define PCI_CLASS_BRIDGE_OTHER 0x0680 +#define PCI_BASE_CLASS_COMMUNICATION 0x07 #define PCI_CLASS_COMMUNICATION_SERIAL 0x0700 +#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701 +#define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702 +#define PCI_CLASS_COMMUNICATION_MODEM 0x0703 +#define PCI_CLASS_COMMUNICATION_GPIB 0x0704 +#define PCI_CLASS_COMMUNICATION_SC 0x0705 #define PCI_CLASS_COMMUNICATION_OTHER 0x0780 +#define PCI_BASE_CLASS_SYSTEM 0x08 +#define PCI_CLASS_SYSTEM_PIC 0x0800 +#define PCI_CLASS_SYSTEM_PIC_IOAPIC 0x080010 +#define PCI_CLASS_SYSTEM_PIC_IOXAPIC 0x080020 +#define PCI_CLASS_SYSTEM_DMA 0x0801 +#define PCI_CLASS_SYSTEM_TIMER 0x0802 +#define PCI_CLASS_SYSTEM_RTC 0x0803 +#define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 +#define PCI_CLASS_SYSTEM_SDHCI 0x0805 +#define PCI_CLASS_SYSTEM_OTHER 0x0880 + +#define PCI_BASE_CLASS_INPUT 0x09 #define PCI_CLASS_INPUT_KEYBOARD 0x0900 #define PCI_CLASS_INPUT_PEN 0x0901 #define PCI_CLASS_INPUT_MOUSE 0x0902 @@ -54,8 +97,59 @@ #define PCI_CLASS_INPUT_GAMEPORT 0x0904 #define PCI_CLASS_INPUT_OTHER 0x0980 -#define PCI_CLASS_PROCESSOR_CO 0x0b40 +#define PCI_BASE_CLASS_DOCKING 0x0a +#define PCI_CLASS_DOCKING_GENERIC 0x0a00 +#define PCI_CLASS_DOCKING_OTHER 0x0a80 + +#define PCI_BASE_CLASS_PROCESSOR 0x0b +#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02 #define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 +#define PCI_CLASS_PROCESSOR_MIPS 0x0b30 +#define PCI_CLASS_PROCESSOR_CO 0x0b40 + +#define PCI_BASE_CLASS_SERIAL 0x0c +#define PCI_CLASS_SERIAL_FIREWIRE 0x0c00 +#define PCI_CLASS_SERIAL_ACCESS 0x0c01 +#define PCI_CLASS_SERIAL_SSA 0x0c02 +#define PCI_CLASS_SERIAL_USB 0x0c03 +#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300 +#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310 +#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320 +#define PCI_CLASS_SERIAL_USB_XHCI 0x0c0330 +#define PCI_CLASS_SERIAL_USB_UNKNOWN 0x0c0380 +#define PCI_CLASS_SERIAL_USB_DEVICE 0x0c03fe +#define PCI_CLASS_SERIAL_FIBER 0x0c04 +#define PCI_CLASS_SERIAL_SMBUS 0x0c05 +#define PCI_CLASS_SERIAL_IB 0x0c06 +#define PCI_CLASS_SERIAL_IPMI 0x0c07 +#define PCI_CLASS_SERIAL_SERCOS 0x0c08 +#define PCI_CLASS_SERIAL_CANBUS 0x0c09 + +#define PCI_BASE_CLASS_WIRELESS 0x0d +#define PCI_CLASS_WIRELESS_IRDA 0x0d00 +#define PCI_CLASS_WIRELESS_CIR 0x0d01 +#define PCI_CLASS_WIRELESS_RF_CONTROLLER 0x0d10 +#define PCI_CLASS_WIRELESS_BLUETOOTH 0x0d11 +#define PCI_CLASS_WIRELESS_BROADBAND 0x0d12 +#define PCI_CLASS_WIRELESS_OTHER 0x0d80 + +#define PCI_BASE_CLASS_SATELLITE 0x0f +#define PCI_CLASS_SATELLITE_TV 0x0f00 +#define PCI_CLASS_SATELLITE_AUDIO 0x0f01 +#define PCI_CLASS_SATELLITE_VOICE 0x0f03 +#define PCI_CLASS_SATELLITE_DATA 0x0f04 + +#define PCI_BASE_CLASS_CRYPT 0x10 +#define PCI_CLASS_CRYPT_NETWORK 0x1000 +#define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001 +#define PCI_CLASS_CRYPT_OTHER 0x1080 + +#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11 +#define PCI_CLASS_SP_DPIO 0x1100 +#define PCI_CLASS_SP_PERF 0x1101 +#define PCI_CLASS_SP_SYNCH 0x1110 +#define PCI_CLASS_SP_MANAGEMENT 0x1120 +#define PCI_CLASS_SP_OTHER 0x1180 #define PCI_CLASS_OTHERS 0xff -- 2.4.3 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH v5 1/2] PCI: add missing classes in pci_ids.h to build device tree 2015-09-30 15:13 ` [Qemu-devel] [PATCH v5 1/2] PCI: add missing classes in pci_ids.h to build device tree Laurent Vivier @ 2015-10-01 3:11 ` David Gibson 0 siblings, 0 replies; 5+ messages in thread From: David Gibson @ 2015-10-01 3:11 UTC (permalink / raw) To: Laurent Vivier Cc: thuth, Michael S. Tsirkin, qemu-ppc, Alexander Graf, qemu-devel [-- Attachment #1: Type: text/plain, Size: 7966 bytes --] On Wed, Sep 30, 2015 at 05:13:18PM +0200, Laurent Vivier wrote: > To allow QEMU to add PCI entries in device tree, > we must have a more exhaustive list of PCI class IDs. > > This patch synchronizes as much as possible with > pci_ids.h and add some missing IDs from SLOF. > > Signed-off-by: Laurent Vivier <lvivier@redhat.com> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com> > Reviewed-by: Thomas Huth <thuth@redhat.com> Michael, Should I take this through my tree, or do you want to take it through yours? If the first, can I get an Acked-by? > --- > include/hw/pci/pci_ids.h | 112 +++++++++++++++++++++++++++++++++++++++++++---- > 1 file changed, 103 insertions(+), 9 deletions(-) > > diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h > index d98e6c9..e27dc39 100644 > --- a/include/hw/pci/pci_ids.h > +++ b/include/hw/pci/pci_ids.h > @@ -12,41 +12,84 @@ > > /* Device classes and subclasses */ > > -#define PCI_BASE_CLASS_STORAGE 0x01 > -#define PCI_BASE_CLASS_NETWORK 0x02 > +#define PCI_CLASS_NOT_DEFINED 0x0000 > +#define PCI_CLASS_NOT_DEFINED_VGA 0x0001 > > +#define PCI_BASE_CLASS_STORAGE 0x01 > #define PCI_CLASS_STORAGE_SCSI 0x0100 > #define PCI_CLASS_STORAGE_IDE 0x0101 > +#define PCI_CLASS_STORAGE_FLOPPY 0x0102 > +#define PCI_CLASS_STORAGE_IPI 0x0103 > #define PCI_CLASS_STORAGE_RAID 0x0104 > +#define PCI_CLASS_STORAGE_ATA 0x0105 > #define PCI_CLASS_STORAGE_SATA 0x0106 > +#define PCI_CLASS_STORAGE_SAS 0x0107 > #define PCI_CLASS_STORAGE_EXPRESS 0x0108 > #define PCI_CLASS_STORAGE_OTHER 0x0180 > > +#define PCI_BASE_CLASS_NETWORK 0x02 > #define PCI_CLASS_NETWORK_ETHERNET 0x0200 > +#define PCI_CLASS_NETWORK_TOKEN_RING 0x0201 > +#define PCI_CLASS_NETWORK_FDDI 0x0202 > +#define PCI_CLASS_NETWORK_ATM 0x0203 > +#define PCI_CLASS_NETWORK_ISDN 0x0204 > +#define PCI_CLASS_NETWORK_WORLDFIP 0x0205 > +#define PCI_CLASS_NETWORK_PICMG214 0x0206 > #define PCI_CLASS_NETWORK_OTHER 0x0280 > > +#define PCI_BASE_CLASS_DISPLAY 0x03 > #define PCI_CLASS_DISPLAY_VGA 0x0300 > +#define PCI_CLASS_DISPLAY_XGA 0x0301 > +#define PCI_CLASS_DISPLAY_3D 0x0302 > #define PCI_CLASS_DISPLAY_OTHER 0x0380 > > +#define PCI_BASE_CLASS_MULTIMEDIA 0x04 > +#define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 > #define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 > +#define PCI_CLASS_MULTIMEDIA_PHONE 0x0402 > +#define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 > > +#define PCI_BASE_CLASS_MEMORY 0x05 > #define PCI_CLASS_MEMORY_RAM 0x0500 > +#define PCI_CLASS_MEMORY_FLASH 0x0501 > +#define PCI_CLASS_MEMORY_OTHER 0x0580 > > -#define PCI_CLASS_SYSTEM_SDHCI 0x0805 > -#define PCI_CLASS_SYSTEM_OTHER 0x0880 > - > -#define PCI_CLASS_SERIAL_USB 0x0c03 > -#define PCI_CLASS_SERIAL_SMBUS 0x0c05 > - > +#define PCI_BASE_CLASS_BRIDGE 0x06 > #define PCI_CLASS_BRIDGE_HOST 0x0600 > #define PCI_CLASS_BRIDGE_ISA 0x0601 > +#define PCI_CLASS_BRIDGE_EISA 0x0602 > +#define PCI_CLASS_BRIDGE_MC 0x0603 > #define PCI_CLASS_BRIDGE_PCI 0x0604 > #define PCI_CLASS_BRIDGE_PCI_INF_SUB 0x01 > +#define PCI_CLASS_BRIDGE_PCMCIA 0x0605 > +#define PCI_CLASS_BRIDGE_NUBUS 0x0606 > +#define PCI_CLASS_BRIDGE_CARDBUS 0x0607 > +#define PCI_CLASS_BRIDGE_RACEWAY 0x0608 > +#define PCI_CLASS_BRIDGE_PCI_SEMITP 0x0609 > +#define PCI_CLASS_BRIDGE_IB_PCI 0x060a > #define PCI_CLASS_BRIDGE_OTHER 0x0680 > > +#define PCI_BASE_CLASS_COMMUNICATION 0x07 > #define PCI_CLASS_COMMUNICATION_SERIAL 0x0700 > +#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701 > +#define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702 > +#define PCI_CLASS_COMMUNICATION_MODEM 0x0703 > +#define PCI_CLASS_COMMUNICATION_GPIB 0x0704 > +#define PCI_CLASS_COMMUNICATION_SC 0x0705 > #define PCI_CLASS_COMMUNICATION_OTHER 0x0780 > > +#define PCI_BASE_CLASS_SYSTEM 0x08 > +#define PCI_CLASS_SYSTEM_PIC 0x0800 > +#define PCI_CLASS_SYSTEM_PIC_IOAPIC 0x080010 > +#define PCI_CLASS_SYSTEM_PIC_IOXAPIC 0x080020 > +#define PCI_CLASS_SYSTEM_DMA 0x0801 > +#define PCI_CLASS_SYSTEM_TIMER 0x0802 > +#define PCI_CLASS_SYSTEM_RTC 0x0803 > +#define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 > +#define PCI_CLASS_SYSTEM_SDHCI 0x0805 > +#define PCI_CLASS_SYSTEM_OTHER 0x0880 > + > +#define PCI_BASE_CLASS_INPUT 0x09 > #define PCI_CLASS_INPUT_KEYBOARD 0x0900 > #define PCI_CLASS_INPUT_PEN 0x0901 > #define PCI_CLASS_INPUT_MOUSE 0x0902 > @@ -54,8 +97,59 @@ > #define PCI_CLASS_INPUT_GAMEPORT 0x0904 > #define PCI_CLASS_INPUT_OTHER 0x0980 > > -#define PCI_CLASS_PROCESSOR_CO 0x0b40 > +#define PCI_BASE_CLASS_DOCKING 0x0a > +#define PCI_CLASS_DOCKING_GENERIC 0x0a00 > +#define PCI_CLASS_DOCKING_OTHER 0x0a80 > + > +#define PCI_BASE_CLASS_PROCESSOR 0x0b > +#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02 > #define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 > +#define PCI_CLASS_PROCESSOR_MIPS 0x0b30 > +#define PCI_CLASS_PROCESSOR_CO 0x0b40 > + > +#define PCI_BASE_CLASS_SERIAL 0x0c > +#define PCI_CLASS_SERIAL_FIREWIRE 0x0c00 > +#define PCI_CLASS_SERIAL_ACCESS 0x0c01 > +#define PCI_CLASS_SERIAL_SSA 0x0c02 > +#define PCI_CLASS_SERIAL_USB 0x0c03 > +#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300 > +#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310 > +#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320 > +#define PCI_CLASS_SERIAL_USB_XHCI 0x0c0330 > +#define PCI_CLASS_SERIAL_USB_UNKNOWN 0x0c0380 > +#define PCI_CLASS_SERIAL_USB_DEVICE 0x0c03fe > +#define PCI_CLASS_SERIAL_FIBER 0x0c04 > +#define PCI_CLASS_SERIAL_SMBUS 0x0c05 > +#define PCI_CLASS_SERIAL_IB 0x0c06 > +#define PCI_CLASS_SERIAL_IPMI 0x0c07 > +#define PCI_CLASS_SERIAL_SERCOS 0x0c08 > +#define PCI_CLASS_SERIAL_CANBUS 0x0c09 > + > +#define PCI_BASE_CLASS_WIRELESS 0x0d > +#define PCI_CLASS_WIRELESS_IRDA 0x0d00 > +#define PCI_CLASS_WIRELESS_CIR 0x0d01 > +#define PCI_CLASS_WIRELESS_RF_CONTROLLER 0x0d10 > +#define PCI_CLASS_WIRELESS_BLUETOOTH 0x0d11 > +#define PCI_CLASS_WIRELESS_BROADBAND 0x0d12 > +#define PCI_CLASS_WIRELESS_OTHER 0x0d80 > + > +#define PCI_BASE_CLASS_SATELLITE 0x0f > +#define PCI_CLASS_SATELLITE_TV 0x0f00 > +#define PCI_CLASS_SATELLITE_AUDIO 0x0f01 > +#define PCI_CLASS_SATELLITE_VOICE 0x0f03 > +#define PCI_CLASS_SATELLITE_DATA 0x0f04 > + > +#define PCI_BASE_CLASS_CRYPT 0x10 > +#define PCI_CLASS_CRYPT_NETWORK 0x1000 > +#define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001 > +#define PCI_CLASS_CRYPT_OTHER 0x1080 > + > +#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11 > +#define PCI_CLASS_SP_DPIO 0x1100 > +#define PCI_CLASS_SP_PERF 0x1101 > +#define PCI_CLASS_SP_SYNCH 0x1110 > +#define PCI_CLASS_SP_MANAGEMENT 0x1120 > +#define PCI_CLASS_SP_OTHER 0x1180 > > #define PCI_CLASS_OTHERS 0xff > -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson [-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* [Qemu-devel] [PATCH v5 2/2] spapr: generate DT node names 2015-09-30 15:13 [Qemu-devel] [PATCH v5 0/2] spapr: generate DT node names Laurent Vivier 2015-09-30 15:13 ` [Qemu-devel] [PATCH v5 1/2] PCI: add missing classes in pci_ids.h to build device tree Laurent Vivier @ 2015-09-30 15:13 ` Laurent Vivier 2015-10-01 3:15 ` David Gibson 1 sibling, 1 reply; 5+ messages in thread From: Laurent Vivier @ 2015-09-30 15:13 UTC (permalink / raw) To: qemu-ppc Cc: Laurent Vivier, thuth, Michael S. Tsirkin, qemu-devel, Alexander Graf, David Gibson When DT node names for PCI devices are generated by SLOF, they are generated according to the type of the device (for instance, ethernet for virtio-net-pci device). Node name for hotplugged devices is generated by QEMU. This patch adds the mechanic to QEMU to create the node name according to the device type too. The data structure has been roughly copied from OpenBIOS/OpenHackware, node names from SLOF. Example: Hotplugging some PCI cards with QEMU monitor: device_add virtio-tablet-pci device_add virtio-serial-pci device_add virtio-mouse-pci device_add virtio-scsi-pci device_add virtio-gpu-pci device_add ne2k_pci device_add nec-usb-xhci device_add intel-hda What we can see in linux device tree: for dir in /proc/device-tree/pci@800000020000000/*@*/; do echo $dir cat $dir/name echo done WITHOUT this patch: /proc/device-tree/pci@800000020000000/pci@0/ pci /proc/device-tree/pci@800000020000000/pci@1/ pci /proc/device-tree/pci@800000020000000/pci@2/ pci /proc/device-tree/pci@800000020000000/pci@3/ pci /proc/device-tree/pci@800000020000000/pci@4/ pci /proc/device-tree/pci@800000020000000/pci@5/ pci /proc/device-tree/pci@800000020000000/pci@6/ pci /proc/device-tree/pci@800000020000000/pci@7/ pci WITH this patch: /proc/device-tree/pci@800000020000000/communication-controller@1/ communication-controller /proc/device-tree/pci@800000020000000/display@4/ display /proc/device-tree/pci@800000020000000/ethernet@5/ ethernet /proc/device-tree/pci@800000020000000/input-controller@0/ input-controller /proc/device-tree/pci@800000020000000/mouse@2/ mouse /proc/device-tree/pci@800000020000000/multimedia-device@7/ multimedia-device /proc/device-tree/pci@800000020000000/scsi@3/ scsi /proc/device-tree/pci@800000020000000/usb-xhci@6/ usb-xhci Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> --- hw/ppc/spapr_pci.c | 290 ++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 276 insertions(+), 14 deletions(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index a2feb4c..7f1644a 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -38,6 +38,7 @@ #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_bus.h" +#include "hw/pci/pci_ids.h" #include "hw/ppc/spapr_drc.h" #include "sysemu/device_tree.h" @@ -944,6 +945,274 @@ static void populate_resource_props(PCIDevice *d, ResourceProps *rp) rp->assigned_len = assigned_idx * sizeof(ResourceFields); } +typedef struct PCIClass PCIClass; +typedef struct PCISubClass PCISubClass; +typedef struct PCIIFace PCIIFace; + +struct PCIIFace { + int iface; + const char *name; +}; + +struct PCISubClass { + int subclass; + const char *name; + const PCIIFace *iface; +}; + +struct PCIClass { + const char *name; + const PCISubClass *subc; +}; + +static const PCISubClass undef_subclass[] = { + { PCI_CLASS_NOT_DEFINED_VGA, "display", NULL }, + { 0xFF, NULL, NULL, NULL }, +}; + +static const PCISubClass mass_subclass[] = { + { PCI_CLASS_STORAGE_SCSI, "scsi", NULL }, + { PCI_CLASS_STORAGE_IDE, "ide", NULL }, + { PCI_CLASS_STORAGE_FLOPPY, "fdc", NULL }, + { PCI_CLASS_STORAGE_IPI, "ipi", NULL }, + { PCI_CLASS_STORAGE_RAID, "raid", NULL }, + { PCI_CLASS_STORAGE_ATA, "ata", NULL }, + { PCI_CLASS_STORAGE_SATA, "sata", NULL }, + { PCI_CLASS_STORAGE_SAS, "sas", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass net_subclass[] = { + { PCI_CLASS_NETWORK_ETHERNET, "ethernet", NULL }, + { PCI_CLASS_NETWORK_TOKEN_RING, "token-ring", NULL }, + { PCI_CLASS_NETWORK_FDDI, "fddi", NULL }, + { PCI_CLASS_NETWORK_ATM, "atm", NULL }, + { PCI_CLASS_NETWORK_ISDN, "isdn", NULL }, + { PCI_CLASS_NETWORK_WORLDFIP, "worldfip", NULL }, + { PCI_CLASS_NETWORK_PICMG214, "picmg", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass displ_subclass[] = { + { PCI_CLASS_DISPLAY_VGA, "vga", NULL }, + { PCI_CLASS_DISPLAY_XGA, "xga", NULL }, + { PCI_CLASS_DISPLAY_3D, "3d-controller", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass media_subclass[] = { + { PCI_CLASS_MULTIMEDIA_VIDEO, "video", NULL }, + { PCI_CLASS_MULTIMEDIA_AUDIO, "sound", NULL }, + { PCI_CLASS_MULTIMEDIA_PHONE, "telephony", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass mem_subclass[] = { + { PCI_CLASS_MEMORY_RAM, "memory", NULL }, + { PCI_CLASS_MEMORY_FLASH, "flash", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass bridg_subclass[] = { + { PCI_CLASS_BRIDGE_HOST, "host", NULL }, + { PCI_CLASS_BRIDGE_ISA, "isa", NULL }, + { PCI_CLASS_BRIDGE_EISA, "eisa", NULL }, + { PCI_CLASS_BRIDGE_MC, "mca", NULL }, + { PCI_CLASS_BRIDGE_PCI, "pci", NULL }, + { PCI_CLASS_BRIDGE_PCMCIA, "pcmcia", NULL }, + { PCI_CLASS_BRIDGE_NUBUS, "nubus", NULL }, + { PCI_CLASS_BRIDGE_CARDBUS, "cardbus", NULL }, + { PCI_CLASS_BRIDGE_RACEWAY, "raceway", NULL }, + { PCI_CLASS_BRIDGE_PCI_SEMITP, "semi-transparent-pci", NULL }, + { PCI_CLASS_BRIDGE_IB_PCI, "infiniband", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass comm_subclass[] = { + { PCI_CLASS_COMMUNICATION_SERIAL, "serial", NULL }, + { PCI_CLASS_COMMUNICATION_PARALLEL, "parallel", NULL }, + { PCI_CLASS_COMMUNICATION_MULTISERIAL, "multiport-serial", NULL }, + { PCI_CLASS_COMMUNICATION_MODEM, "modem", NULL }, + { PCI_CLASS_COMMUNICATION_GPIB, "gpib", NULL }, + { PCI_CLASS_COMMUNICATION_SC, "smart-card", NULL }, + { 0xFF, NULL, NULL, NULL }, +}; + +static const PCIIFace pic_iface[] = { + { PCI_CLASS_SYSTEM_PIC_IOAPIC, "io-apic" }, + { PCI_CLASS_SYSTEM_PIC_IOXAPIC, "io-xapic" }, + { 0xFF, NULL }, +}; + +static const PCISubClass sys_subclass[] = { + { PCI_CLASS_SYSTEM_PIC, "interrupt-controller", pic_iface }, + { PCI_CLASS_SYSTEM_DMA, "dma-controller", NULL }, + { PCI_CLASS_SYSTEM_TIMER, "timer", NULL }, + { PCI_CLASS_SYSTEM_RTC, "rtc", NULL }, + { PCI_CLASS_SYSTEM_PCI_HOTPLUG, "hot-plug-controller", NULL }, + { PCI_CLASS_SYSTEM_SDHCI, "sd-host-controller", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass inp_subclass[] = { + { PCI_CLASS_INPUT_KEYBOARD, "keyboard", NULL }, + { PCI_CLASS_INPUT_PEN, "pen", NULL }, + { PCI_CLASS_INPUT_MOUSE, "mouse", NULL }, + { PCI_CLASS_INPUT_SCANNER, "scanner", NULL }, + { PCI_CLASS_INPUT_GAMEPORT, "gameport", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass dock_subclass[] = { + { PCI_CLASS_DOCKING_GENERIC, "dock", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass cpu_subclass[] = { + { PCI_CLASS_PROCESSOR_PENTIUM, "pentium", NULL }, + { PCI_CLASS_PROCESSOR_POWERPC, "powerpc", NULL }, + { PCI_CLASS_PROCESSOR_MIPS, "mips", NULL }, + { PCI_CLASS_PROCESSOR_CO, "co-processor", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCIIFace usb_iface[] = { + { PCI_CLASS_SERIAL_USB_UHCI, "usb-uhci" }, + { PCI_CLASS_SERIAL_USB_OHCI, "usb-ohci", }, + { PCI_CLASS_SERIAL_USB_EHCI, "usb-ehci" }, + { PCI_CLASS_SERIAL_USB_XHCI, "usb-xhci" }, + { PCI_CLASS_SERIAL_USB_UNKNOWN, "usb-unknown" }, + { PCI_CLASS_SERIAL_USB_DEVICE, "usb-device" }, + { 0xFF, NULL }, +}; + +static const PCISubClass ser_subclass[] = { + { PCI_CLASS_SERIAL_FIREWIRE, "firewire", NULL }, + { PCI_CLASS_SERIAL_ACCESS, "access-bus", NULL }, + { PCI_CLASS_SERIAL_SSA, "ssa", NULL }, + { PCI_CLASS_SERIAL_USB, "usb", usb_iface }, + { PCI_CLASS_SERIAL_FIBER, "fibre-channel", NULL }, + { PCI_CLASS_SERIAL_SMBUS, "smb", NULL }, + { PCI_CLASS_SERIAL_IB, "infiniband", NULL }, + { PCI_CLASS_SERIAL_IPMI, "ipmi", NULL }, + { PCI_CLASS_SERIAL_SERCOS, "sercos", NULL }, + { PCI_CLASS_SERIAL_CANBUS, "canbus", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass wrl_subclass[] = { + { PCI_CLASS_WIRELESS_IRDA, "irda", NULL }, + { PCI_CLASS_WIRELESS_CIR, "consumer-ir", NULL }, + { PCI_CLASS_WIRELESS_RF_CONTROLLER, "rf-controller", NULL }, + { PCI_CLASS_WIRELESS_BLUETOOTH, "bluetooth", NULL }, + { PCI_CLASS_WIRELESS_BROADBAND, "broadband", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass sat_subclass[] = { + { PCI_CLASS_SATELLITE_TV, "satellite-tv", NULL }, + { PCI_CLASS_SATELLITE_AUDIO, "satellite-audio", NULL }, + { PCI_CLASS_SATELLITE_VOICE, "satellite-voice", NULL }, + { PCI_CLASS_SATELLITE_DATA, "satellite-data", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass crypt_subclass[] = { + { PCI_CLASS_CRYPT_NETWORK, "network-encryption", NULL }, + { PCI_CLASS_CRYPT_ENTERTAINMENT, + "entertainment-encryption", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCISubClass spc_subclass[] = { + { PCI_CLASS_SP_DPIO, "dpio", NULL }, + { PCI_CLASS_SP_PERF, "counter", NULL }, + { PCI_CLASS_SP_SYNCH, "measurement", NULL }, + { PCI_CLASS_SP_MANAGEMENT, "management-card", NULL }, + { 0xFF, NULL, NULL }, +}; + +static const PCIClass pci_classes[] = { + { "legacy-device", undef_subclass }, + { "mass-storage", mass_subclass }, + { "network", net_subclass }, + { "display", displ_subclass, }, + { "multimedia-device", media_subclass }, + { "memory-controller", mem_subclass }, + { "unknown-bridge", bridg_subclass }, + { "communication-controller", comm_subclass}, + { "system-peripheral", sys_subclass }, + { "input-controller", inp_subclass }, + { "docking-station", dock_subclass }, + { "cpu", cpu_subclass }, + { "serial-bus", ser_subclass }, + { "wireless-controller", wrl_subclass }, + { "intelligent-io", NULL }, + { "satellite-device", sat_subclass }, + { "encryption", crypt_subclass }, + { "data-processing-controller", spc_subclass }, +}; + +static const char *pci_find_device_name(uint8_t class, uint8_t subclass, + uint8_t iface) +{ + const PCIClass *pclass; + const PCISubClass *psubclass; + const PCIIFace *piface; + const char *name; + + if (class >= ARRAY_SIZE(pci_classes)) { + return "pci"; + } + + pclass = pci_classes + class; + name = pclass->name; + + if (pclass->subc == NULL) { + return name; + } + + psubclass = pclass->subc; + while ((psubclass->subclass & 0xff) != 0xff) { + if ((psubclass->subclass & 0xff) == subclass) { + name = psubclass->name; + break; + } + psubclass++; + } + + piface = psubclass->iface; + if (piface == NULL) { + return name; + } + while ((piface->iface & 0xff) != 0xff) { + if ((piface->iface & 0xff) == iface) { + name = piface->name; + break; + } + piface++; + } + + return name; +} + +static void pci_get_node_name(char *nodename, int len, PCIDevice *dev) +{ + int slot = PCI_SLOT(dev->devfn); + int func = PCI_FUNC(dev->devfn); + uint32_t ccode = pci_default_read_config(dev, PCI_CLASS_PROG, 3); + const char *name; + + name = pci_find_device_name((ccode >> 16) & 0xff, (ccode >> 8) & 0xff, + ccode & 0xff); + + if (func != 0) { + snprintf(nodename, len, "%s@%x,%x", name, slot, func); + } else { + snprintf(nodename, len, "%s@%x", name, slot); + } +} + static uint32_t spapr_phb_get_pci_drc_index(sPAPRPHBState *phb, PCIDevice *pdev); @@ -955,6 +1224,7 @@ static int spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset, int pci_status, err; char *buf = NULL; uint32_t drc_index = spapr_phb_get_pci_drc_index(sphb, dev); + uint32_t ccode = pci_default_read_config(dev, PCI_CLASS_PROG, 3); if (pci_default_read_config(dev, PCI_HEADER_TYPE, 1) == PCI_HEADER_TYPE_BRIDGE) { @@ -968,8 +1238,7 @@ static int spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset, pci_default_read_config(dev, PCI_DEVICE_ID, 2))); _FDT(fdt_setprop_cell(fdt, offset, "revision-id", pci_default_read_config(dev, PCI_REVISION_ID, 1))); - _FDT(fdt_setprop_cell(fdt, offset, "class-code", - pci_default_read_config(dev, PCI_CLASS_PROG, 3))); + _FDT(fdt_setprop_cell(fdt, offset, "class-code", ccode)); if (pci_default_read_config(dev, PCI_INTERRUPT_PIN, 1)) { _FDT(fdt_setprop_cell(fdt, offset, "interrupts", pci_default_read_config(dev, PCI_INTERRUPT_PIN, 1))); @@ -1010,11 +1279,10 @@ static int spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset, _FDT(fdt_setprop(fdt, offset, "udf-supported", NULL, 0)); } - /* NOTE: this is normally generated by firmware via path/unit name, - * but in our case we must set it manually since it does not get - * processed by OF beforehand - */ - _FDT(fdt_setprop_string(fdt, offset, "name", "pci")); + _FDT(fdt_setprop_string(fdt, offset, "name", + pci_find_device_name((ccode >> 16) & 0xff, + (ccode >> 8) & 0xff, + ccode & 0xff))); buf = spapr_phb_get_loc_code(sphb, dev); if (!buf) { error_report("Failed setting the ibm,loc-code"); @@ -1051,15 +1319,9 @@ static int spapr_create_pci_child_dt(sPAPRPHBState *phb, PCIDevice *dev, void *fdt, int node_offset) { int offset, ret; - int slot = PCI_SLOT(dev->devfn); - int func = PCI_FUNC(dev->devfn); char nodename[FDT_NAME_MAX]; - if (func != 0) { - snprintf(nodename, FDT_NAME_MAX, "pci@%x,%x", slot, func); - } else { - snprintf(nodename, FDT_NAME_MAX, "pci@%x", slot); - } + pci_get_node_name(nodename, FDT_NAME_MAX, dev); offset = fdt_add_subnode(fdt, node_offset, nodename); ret = spapr_populate_pci_child_dt(dev, fdt, offset, phb); -- 2.4.3 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH v5 2/2] spapr: generate DT node names 2015-09-30 15:13 ` [Qemu-devel] [PATCH v5 2/2] spapr: generate DT node names Laurent Vivier @ 2015-10-01 3:15 ` David Gibson 0 siblings, 0 replies; 5+ messages in thread From: David Gibson @ 2015-10-01 3:15 UTC (permalink / raw) To: Laurent Vivier Cc: thuth, Michael S. Tsirkin, qemu-ppc, Alexander Graf, qemu-devel [-- Attachment #1: Type: text/plain, Size: 2403 bytes --] On Wed, Sep 30, 2015 at 05:13:19PM +0200, Laurent Vivier wrote: > When DT node names for PCI devices are generated by SLOF, > they are generated according to the type of the device > (for instance, ethernet for virtio-net-pci device). > > Node name for hotplugged devices is generated by QEMU. > This patch adds the mechanic to QEMU to create the node > name according to the device type too. > > The data structure has been roughly copied from OpenBIOS/OpenHackware, > node names from SLOF. > > Example: > > Hotplugging some PCI cards with QEMU monitor: > > device_add virtio-tablet-pci > device_add virtio-serial-pci > device_add virtio-mouse-pci > device_add virtio-scsi-pci > device_add virtio-gpu-pci > device_add ne2k_pci > device_add nec-usb-xhci > device_add intel-hda > > What we can see in linux device tree: > > for dir in /proc/device-tree/pci@800000020000000/*@*/; do > echo $dir > cat $dir/name > echo > done > > WITHOUT this patch: > > /proc/device-tree/pci@800000020000000/pci@0/ > pci > /proc/device-tree/pci@800000020000000/pci@1/ > pci > /proc/device-tree/pci@800000020000000/pci@2/ > pci > /proc/device-tree/pci@800000020000000/pci@3/ > pci > /proc/device-tree/pci@800000020000000/pci@4/ > pci > /proc/device-tree/pci@800000020000000/pci@5/ > pci > /proc/device-tree/pci@800000020000000/pci@6/ > pci > /proc/device-tree/pci@800000020000000/pci@7/ > pci > > WITH this patch: > > /proc/device-tree/pci@800000020000000/communication-controller@1/ > communication-controller > /proc/device-tree/pci@800000020000000/display@4/ > display > /proc/device-tree/pci@800000020000000/ethernet@5/ > ethernet > /proc/device-tree/pci@800000020000000/input-controller@0/ > input-controller > /proc/device-tree/pci@800000020000000/mouse@2/ > mouse > /proc/device-tree/pci@800000020000000/multimedia-device@7/ > multimedia-device > /proc/device-tree/pci@800000020000000/scsi@3/ > scsi > /proc/device-tree/pci@800000020000000/usb-xhci@6/ > usb-xhci > > Signed-off-by: Laurent Vivier <lvivier@redhat.com> > Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson [-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-10-01 3:32 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-09-30 15:13 [Qemu-devel] [PATCH v5 0/2] spapr: generate DT node names Laurent Vivier 2015-09-30 15:13 ` [Qemu-devel] [PATCH v5 1/2] PCI: add missing classes in pci_ids.h to build device tree Laurent Vivier 2015-10-01 3:11 ` David Gibson 2015-09-30 15:13 ` [Qemu-devel] [PATCH v5 2/2] spapr: generate DT node names Laurent Vivier 2015-10-01 3:15 ` David Gibson
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