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Date: Thu, 8 Oct 2015 18:12:42 +0200
From: Aurelien Jarno <aurelien@aurel32.net>
Message-ID: <20151008161242.GA7277@aurel32.net>
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Subject: Re: [Qemu-devel] [PATCH v3 3/6] tcg/mips: Add
	use_mips32r6_instructions definition
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To: James Hogan <james.hogan@imgtec.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>, qemu-devel@nongnu.org, Richard Henderson <rth@twiddle.net>

On 2015-10-02 13:24, James Hogan wrote:
> Add definition use_mips32r6_instructions to the MIPS TCG backend which
> is constant 1 when built for MIPS release 6. This will be used to decide
> between pre-R6 and R6 instruction encodings.
> 
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Reviewed-by: Richard Henderson <rth@twiddle.net>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> ---
>  tcg/mips/tcg-target.h | 7 +++++++
>  1 file changed, 7 insertions(+)

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
> index f5ba52cacfe5..e579c10b9aaa 100644
> --- a/tcg/mips/tcg-target.h
> +++ b/tcg/mips/tcg-target.h
> @@ -96,6 +96,13 @@ extern bool use_mips32_instructions;
>  extern bool use_mips32r2_instructions;
>  #endif
>  
> +/* MIPS32R6 instruction set detection */
> +#if defined(__mips_isa_rev) && (__mips_isa_rev >= 6)
> +#define use_mips32r6_instructions  1
> +#else
> +#define use_mips32r6_instructions  0
> +#endif
> +
>  /* optional instructions */
>  #define TCG_TARGET_HAS_div_i32          1
>  #define TCG_TARGET_HAS_rem_i32          1
> -- 
> 2.4.9
> 
> 

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net