From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39130) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZkEYm-0002zF-2u for qemu-devel@nongnu.org; Thu, 08 Oct 2015 13:01:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZkEXu-0006ad-Tr for qemu-devel@nongnu.org; Thu, 08 Oct 2015 13:00:52 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:53621) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZkEXu-0006Zh-JM for qemu-devel@nongnu.org; Thu, 08 Oct 2015 12:59:58 -0400 Date: Thu, 8 Oct 2015 18:19:46 +0200 From: Aurelien Jarno Message-ID: <20151008161946.GA7421@aurel32.net> References: <1443788657-14537-1-git-send-email-james.hogan@imgtec.com> <1443788657-14537-6-git-send-email-james.hogan@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1443788657-14537-6-git-send-email-james.hogan@imgtec.com> Subject: Re: [Qemu-devel] [PATCH v3 5/6] tcg/mips: Support r6 multiply/divide encodings List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: James Hogan Cc: Leon Alrae , qemu-devel@nongnu.org, Richard Henderson On 2015-10-02 13:24, James Hogan wrote: > MIPSr6 adds several new integer multiply, divide, and modulo > instructions, and removes several pre-r6 encodings, along with the HI/LO > registers which were the implicit operands of some of those > instructions. Update TCG to use the new instructions when built for r6. > > The new instructions actually map much more directly to the TCG ops, as > they only provide a single 32-bit half of the result and in a normal > general purpose register instead of HI or LO. > > The mulu2_i32 and muls2_i32 operations are no longer appropriate for r6, > so they are removed from the TCG opcode table. This is because they > would need to emit two separate host instructions anyway (for the high > and low half of the result), which TCG can arrange automatically for us > in the absense of mulu2_i32/muls2_i32 by splitting it into mul_i32 and > mul*h_i32 TCG ops. > > Signed-off-by: James Hogan > Reviewed-by: Richard Henderson > Cc: Aurelien Jarno > --- > Changes in v2: > - Use a common OPC_MUL definition. use_mips32_instructions will always > be 1 for MIPS r6 builds (Richard) > --- > tcg/mips/tcg-target.c | 42 +++++++++++++++++++++++++++++++++++++++++- > tcg/mips/tcg-target.h | 4 ++-- > 2 files changed, 43 insertions(+), 3 deletions(-) Reviewed-by: Aurelien Jarno -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurelien@aurel32.net http://www.aurel32.net