Re: [Qemu-devel] [PATCH v3 1/9] target-arm: Add HPFAR_EL2

["Edgar E. Iglesias" <edgar.iglesias@gmail.com>]

On Thu, Oct 08, 2015 at 10:14:08AM +0100, Alex Bennée wrote:
> 
> Edgar E. Iglesias <edgar.iglesias@gmail.com> writes:
> 
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> >
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> 
> Now Peter has pointed out I can't read ;-)
> 
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>


Thanks for all the clarifications, I'll add your RB to my series.

Best regards,
Edgar




> 
> > ---
> >  target-arm/cpu.h    |  1 +
> >  target-arm/helper.c | 12 ++++++++++++
> >  2 files changed, 13 insertions(+)
> >
> > diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> > index cc1578c..895f2c2 100644
> > --- a/target-arm/cpu.h
> > +++ b/target-arm/cpu.h
> > @@ -278,6 +278,7 @@ typedef struct CPUARMState {
> >              };
> >              uint64_t far_el[4];
> >          };
> > +        uint64_t hpfar_el2;
> >          union { /* Translation result. */
> >              struct {
> >                  uint64_t _unused_par_0;
> > diff --git a/target-arm/helper.c b/target-arm/helper.c
> > index 8367997..5a5e5f0 100644
> > --- a/target-arm/helper.c
> > +++ b/target-arm/helper.c
> > @@ -3223,6 +3223,10 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {
> >      { .name = "CNTHP_CTL_EL2", .state = ARM_CP_STATE_BOTH,
> >        .opc0 = 3, .opc1 = 4, .crn = 14, .crm = 2, .opc2 = 1,
> >        .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
> > +    { .name = "HPFAR_EL2", .state = ARM_CP_STATE_BOTH,
> > +      .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
> > +      .access = PL2_RW, .accessfn = access_el3_aa32ns_aa64any,
> > +      .type = ARM_CP_CONST, .resetvalue = 0 },
> >      REGINFO_SENTINEL
> >  };
> >  
> > @@ -3444,6 +3448,14 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
> >        .resetvalue = 0,
> >        .writefn = gt_hyp_ctl_write, .raw_writefn = raw_write },
> >  #endif
> > +    { .name = "HPFAR", .state = ARM_CP_STATE_AA32,
> > +      .cp = 15, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
> > +      .access = PL2_RW, .accessfn = access_el3_aa32ns,
> > +      .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) },
> > +    { .name = "HPFAR_EL2", .state = ARM_CP_STATE_AA64,
> > +      .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4,
> > +      .access = PL2_RW,
> > +      .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) },
> >      REGINFO_SENTINEL
> >  };
> 
> -- 
> Alex Bennée