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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Pavel Fedin <p.fedin@samsung.com>
Cc: 'Peter Maydell' <peter.maydell@linaro.org>,
	qemu-devel@nongnu.org, 'Paolo Bonzini' <pbonzini@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2 0/3] Make KVM/MSI code device-ID-aware
Date: Wed, 14 Oct 2015 13:44:47 +0300	[thread overview]
Message-ID: <20151014133313-mutt-send-email-mst@redhat.com> (raw)
In-Reply-To: <00d201d1065c$c1f1eb30$45d5c190$@samsung.com>

On Wed, Oct 14, 2015 at 11:46:02AM +0300, Pavel Fedin wrote:
>  Hello!
> 
> > I'm confused by pci changes.  It's all arm specific stuff leaking
> > out to pci core.
> 
>  But... How else would you implement it? I tried to do this as abstract as possible. Just pass device pointer to functions which
> will use it. Or, would you like to override all these functions for ARM architecture? That would be a huge code duplication. And,
> still, they would need PCI device specifier, which they don't have, and what patch 0003 takes care about.
> 
> > Maybe it was a mistake to put stream id in struct MemTxAttrs: there's
> > still nothing using it.
> 
>  It will be used by ITS emulation too. Take a look at RFC, ITS code injects it into the kernel together with MSI data. Also, i know
> that it has something to do with SMMU too, so, if we ever implement ARM SMMU, we'll likely have to deal with them too.
>  Presence of device ID pretty well emulates what the hardware does - it just sends this ID along with PCI transaction.
>  We will use it as soon as we either:
> a) Get kernel API approved
> b) Get software GICv3 emulation from Shlomo, then i'll be able to rebase my old software-emulated ITS on top of that.
> 
> > How about we stick PCIDevice * (or even DeviceState *) there?
> 
>  "there" = where? In MemTxAttrs? Would it be good to have 64-bit pointer instead of 16-bit ID there? It is passed by value, and
> current version fits into register even on 32-bit host.

OK, so we could rename stream id to requester id. That at least would
make sense at the pci level, and would make it unique per hierarchy.

But I suspect all these optimizations break later when we need to support
multiple root complex devices.


> Kind regards,
> Pavel Fedin
> Expert Engineer
> Samsung Electronics Research center Russia
> 

  reply	other threads:[~2015-10-14 10:44 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-14  7:53 [Qemu-devel] [PATCH v2 0/3] Make KVM/MSI code device-ID-aware Pavel Fedin
2015-10-14  7:53 ` [Qemu-devel] [PATCH v2 1/3] kvm: Make KVM_CAP_SIGNAL_MSI globally available Pavel Fedin
2015-10-14  7:53 ` [Qemu-devel] [PATCH v2 2/3] hw/pci: Introduce msi_device_id() Pavel Fedin
2015-10-14  7:53 ` [Qemu-devel] [PATCH v2 3/3] kvm: Pass PCI device pointer to MSI routing functions Pavel Fedin
2015-10-14  8:32 ` [Qemu-devel] [PATCH v2 0/3] Make KVM/MSI code device-ID-aware Michael S. Tsirkin
2015-10-14  8:46   ` Pavel Fedin
2015-10-14 10:44     ` Michael S. Tsirkin [this message]
2015-10-14 11:49       ` Pavel Fedin
2015-10-14 11:59         ` Michael S. Tsirkin

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