From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "QEMU Developers" <qemu-devel@nongnu.org>,
"Alexander Graf" <agraf@suse.de>,
"Sergey Fedorov" <serge.fdrv@gmail.com>,
"Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v4 09/13] target-arm: Add ARMMMUFaultInfo
Date: Mon, 26 Oct 2015 10:53:30 +0100 [thread overview]
Message-ID: <20151026095330.GD3751@toto> (raw)
In-Reply-To: <CAFEAcA9yE_aysQZM_n-+jdP48tEK0Ac0wt86fbvpCwXKvL0rDg@mail.gmail.com>
On Fri, Oct 23, 2015 at 05:53:09PM +0100, Peter Maydell wrote:
> On 14 October 2015 at 23:55, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> >
> > Introduce ARMMMUFaultInfo to propagate MMU Fault information
> > across the MMU translation code path. This is in preparation for
> > adding Stage-2 translation.
> >
> > No functional changes.
> >
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > @@ -1774,9 +1775,10 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
> > bool ret;
> > uint64_t par64;
> > MemTxAttrs attrs = {};
> > + ARMMMUFaultInfo fi = {};
>
> Why are most of these initialized with "{}" ...
>
> > @@ -83,8 +83,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
> > {
> > bool ret;
> > uint32_t fsr = 0;
> > + struct ARMMMUFaultInfo fi = {0};
>
> ...but this one uses "{0}" ?
No reason.. I've removed the struct and zero so it's now:
ARMMMUFaultInfo fi = {};
everywhere.
Thanks,
Edgar
>
> Otherwise
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
>
> thanks
> -- PMM
next prev parent reply other threads:[~2015-10-26 9:53 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-14 22:55 [Qemu-devel] [PATCH v4 00/13] arm: Steps towards EL2 support round 5 Edgar E. Iglesias
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 01/13] target-arm: Add HPFAR_EL2 Edgar E. Iglesias
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 02/13] target-arm: lpae: Make t0sz and t1sz signed integers Edgar E. Iglesias
2015-10-23 15:33 ` Peter Maydell
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 03/13] target-arm: Add support for AArch32 S2 negative t0sz Edgar E. Iglesias
2015-10-23 15:29 ` Peter Maydell
2015-10-26 9:20 ` Edgar E. Iglesias
2015-10-26 9:52 ` Peter Maydell
2015-10-26 10:57 ` Edgar E. Iglesias
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 04/13] target-arm: lpae: Replace tsz with computed inputsize Edgar E. Iglesias
2015-10-23 15:31 ` Peter Maydell
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 05/13] target-arm: lpae: Rename granule_sz to stride Edgar E. Iglesias
2015-10-23 15:32 ` Peter Maydell
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 06/13] target-arm: Add computation of starting level for S2 PTW Edgar E. Iglesias
2015-10-23 16:26 ` Peter Maydell
2015-10-26 9:42 ` Edgar E. Iglesias
2015-10-26 9:44 ` Edgar E. Iglesias
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 07/13] target-arm: Add support for S2 page-table protection bits Edgar E. Iglesias
2015-10-23 16:28 ` Peter Maydell
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 08/13] target-arm: Avoid inline for get_phys_addr Edgar E. Iglesias
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 09/13] target-arm: Add ARMMMUFaultInfo Edgar E. Iglesias
2015-10-23 16:53 ` Peter Maydell
2015-10-26 9:53 ` Edgar E. Iglesias [this message]
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 10/13] target-arm: Add S2 translation to 64bit S1 PTWs Edgar E. Iglesias
2015-10-23 17:12 ` Peter Maydell
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 11/13] target-arm: Add S2 translation to 32bit " Edgar E. Iglesias
2015-10-23 17:12 ` Peter Maydell
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 12/13] target-arm: Route S2 MMU faults to EL2 Edgar E. Iglesias
2015-10-23 16:56 ` Peter Maydell
2015-10-14 22:55 ` [Qemu-devel] [PATCH v4 13/13] target-arm: Add support for S1 + S2 MMU translations Edgar E. Iglesias
2015-10-23 17:09 ` Peter Maydell
2015-10-26 12:33 ` Edgar E. Iglesias
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