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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
	qemu-devel@nongnu.org, patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH for-2.5 0/2] target-arm: improve debug log display of PSTATE/PSR
Date: Tue, 27 Oct 2015 15:37:20 +0100	[thread overview]
Message-ID: <20151027143720.GF18847@toto> (raw)
In-Reply-To: <1445883178-576-1-git-send-email-peter.maydell@linaro.org>

On Mon, Oct 26, 2015 at 06:12:56PM +0000, Peter Maydell wrote:
> These are two small patches which I put together while working
> on support for TZ in ARM, which improve the display of the
> PSTATE and PSR in the -d cpu debug logging.

Looks good to me:

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Cheers,
Edgar

> 
> The first one brings the handling of PSTATE in AArch64 into line with
> the handling of PSR in AArch32, by putting it on its own line and
> with a similar format to the 32-bit version.
> 
> The second one adds NS/S indicators as appropriate so you can distinguish
> NS svc32 from S svc32, and so on.
> 
> Sample output:
> 
> Trace 0x7f9563dc3b00 [4001031c] 
> R00=400100b4 R01=4120c0f1 R02=000f0000 R03=00000008
> R04=40008000 R05=00000000 R06=0000000e R07=ffffffff
> R08=48000000 R09=412fc0f1 R10=00000000 R11=10201105
> R12=400100c8 R13=00000000 R14=400103ec R15=4001031c
> PSR=200001d3 --C- A NS svc32
> 
> 
> Trace 0x7f303d6b7028 [0000000040000000] 
> PC=0000000040000000  SP=0000000000000000
> X00=0000000000000000 X01=0000000000000000 X02=0000000000000000 X03=0000000000000000
> X04=0000000000000000 X05=0000000000000000 X06=0000000000000000 X07=0000000000000000
> X08=0000000000000000 X09=0000000000000000 X10=0000000000000000 X11=0000000000000000
> X12=0000000000000000 X13=0000000000000000 X14=0000000000000000 X15=0000000000000000
> X16=0000000000000000 X17=0000000000000000 X18=0000000000000000 X19=0000000000000000
> X20=0000000000000000 X21=0000000000000000 X22=0000000000000000 X23=0000000000000000
> X24=0000000000000000 X25=0000000000000000 X26=0000000000000000 X27=0000000000000000
> X28=0000000000000000 X29=0000000000000000 X30=0000000000000000 
> PSTATE=400003c5 -Z-- EL1h
> 
> (The S/NS indicator is only displayed if appropriate, ie if the
> CPU supports EL3 at all and if we're not in EL3 or Monitor mode.)
> 
> These don't strictly speaking have to go into 2.5, but given they're
> pretty small and safe it doesn't seem too unreasonable to put them
> there.
> 
> Peter Maydell (2):
>   target-arm: Bring AArch64 debug CPU display of PSTATE into line with
>     AArch32
>   target-arm: Report S/NS status in the CPU debug logs
> 
>  target-arm/translate-a64.c | 17 ++++++++++++++---
>  target-arm/translate.c     | 12 +++++++++++-
>  2 files changed, 25 insertions(+), 4 deletions(-)
> 
> -- 
> 1.9.1
> 

      parent reply	other threads:[~2015-10-27 14:37 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-26 18:12 [Qemu-devel] [PATCH for-2.5 0/2] target-arm: improve debug log display of PSTATE/PSR Peter Maydell
2015-10-26 18:12 ` [Qemu-devel] [PATCH for-2.5 1/2] target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32 Peter Maydell
2015-10-29 15:12   ` Alex Bennée
2015-10-26 18:12 ` [Qemu-devel] [PATCH for-2.5 2/2] target-arm: Report S/NS status in the CPU debug logs Peter Maydell
2015-10-29 15:15   ` Alex Bennée
2015-10-29 15:21     ` Peter Maydell
2015-10-27 14:37 ` Edgar E. Iglesias [this message]

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