From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37026) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zx7ah-00061C-QA for qemu-devel@nongnu.org; Fri, 13 Nov 2015 01:12:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zx7ag-000794-JR for qemu-devel@nongnu.org; Fri, 13 Nov 2015 01:12:07 -0500 Date: Fri, 13 Nov 2015 16:57:04 +1100 From: David Gibson Message-ID: <20151113055704.GM4886@voom.redhat.com> References: <20151111171135.4328.41819.stgit@aravindap> <20151111171602.4328.34006.stgit@aravindap> <56444957.9080003@redhat.com> <5644D931.1070407@linux.vnet.ibm.com> <20151113015816.GK4886@voom.redhat.com> <56456CC0.2060906@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="75WsOQSofUOhcSOp" Content-Disposition: inline In-Reply-To: <56456CC0.2060906@linux.vnet.ibm.com> Subject: Re: [Qemu-devel] [PATCH 4/4] target-ppc: Handle NMI guest exit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aravinda Prasad Cc: Thomas Huth , benh@au1.ibm.com, aik@ozlabs.ru, agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, paulus@samba.org, sam.bobroff@au1.ibm.com --75WsOQSofUOhcSOp Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Nov 13, 2015 at 10:23:20AM +0530, Aravinda Prasad wrote: >=20 >=20 > On Friday 13 November 2015 07:28 AM, David Gibson wrote: > > On Thu, Nov 12, 2015 at 11:53:45PM +0530, Aravinda Prasad wrote: > >> > >> > >> On Thursday 12 November 2015 01:39 PM, Thomas Huth wrote: > >>> On 11/11/15 18:16, Aravinda Prasad wrote: > >>>> Memory error such as bit flips that cannot be corrected > >>>> by hardware are passed on to the kernel for handling. > >>>> If the memory address in error belongs to guest then > >>>> guest kernel is responsible for taking suitable action. > >>>> Patch [1] enhances KVM to exit guest with exit reason > >>>> set to KVM_EXIT_NMI in such cases. > >>>> > >>>> This patch handles KVM_EXIT_NMI exit. If the guest OS > >>>> has registered the machine check handling routine by > >>>> calling "ibm,nmi-register", then the handler builds > >>>> the error log and invokes the registered handler else > >>>> invokes the handler at 0x200. > >>>> > >>>> [1] http://marc.info/?l=3Dkvm-ppc&m=3D144726114408289 > >>>> > >>>> Signed-off-by: Aravinda Prasad > >>>> --- > >>>> target-ppc/kvm.c | 69 +++++++++++++++++++++++++++++++++++++++= ++++ > >>>> target-ppc/kvm_ppc.h | 81 +++++++++++++++++++++++++++++++++++++++= +++++++++++ > >>>> 2 files changed, 150 insertions(+) > >>>> > >>>> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c > >>>> index 110436d..e2e5170 100644 > >>>> --- a/target-ppc/kvm.c > >>>> +++ b/target-ppc/kvm.c > >>>> @@ -1665,6 +1665,11 @@ int kvm_arch_handle_exit(CPUState *cs, struct= kvm_run *run) > >>>> ret =3D 0; > >>>> break; > >>>> =20 > >>>> + case KVM_EXIT_NMI: > >>>> + DPRINTF("handle NMI exception\n"); > >>>> + ret =3D kvm_handle_nmi(cpu); > >>>> + break; > >>>> + > >>>> default: > >>>> fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_= reason); > >>>> ret =3D -1; > >>>> @@ -2484,3 +2489,67 @@ int kvm_arch_msi_data_to_gsi(uint32_t data) > >>>> { > >>>> return data & 0xffff; > >>>> } > >>>> + > >>>> +int kvm_handle_nmi(PowerPCCPU *cpu) > >>>> +{ > >>>> + struct rtas_mc_log mc_log; > >>>> + CPUPPCState *env =3D &cpu->env; > >>>> + sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); > >>>> + PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); > >>>> + > >>>> + cpu_synchronize_state(CPU(ppc_env_get_cpu(env))); > >>>> + > >>>> + /* Properly set bits in MSR before we invoke the handler */ > >>>> + env->msr =3D 0; > >>>> + > >>>> + if (!(*pcc->interrupts_big_endian)(cpu)) { > >>>> + env->msr |=3D (1ULL << MSR_LE); > >>>> + } > >>>> + > >>>> +#ifdef TARGET_PPC64 > >>>> + env->msr |=3D (1ULL << MSR_SF); > >>>> +#endif > >>>> + > >>>> + if (!spapr->guest_machine_check_addr) { > >>>> + /* > >>>> + * If OS has not registered with "ibm,nmi-register" > >>>> + * jump to 0x200 > >>>> + */ > >>> > >>> Shouldn't you also check MSR_ME here first and enter checkstop when > >>> machine checks are disabled? > >> > >> Yes, MSR_ME should be checked first. > >> > >>> Also I think you have to set up some more registers for machine check > >>> interrupts, like SRR0 and SRR1? > >> > >> SRRO and SRR1 of vcpu are properly set in KVM in kvmppc_interrupt_hv. I > >> am not sure if any other registers need to be set. > >=20 > > DAR and DSISR are the obvious ones you need to consider, although I > > suspect they're already set up correctly by the kernel, too. >=20 > Yes, they are also setup properly by KVM. Ok, good. Might be worth throwing a comment in the qemu code noting that the kernel has already set up that state properly. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --75WsOQSofUOhcSOp Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWRXuwAAoJEGw4ysog2bOS6nsP/1m124vGBL8oODG9loIfzFbg rErGVR6E2/uROT9+6XooKmTioyD0RxXxEkDzjFf3XSbcvuFfuhdFGRGMIKV9sqvE oZcQQ/08y3TphHqW6awYn2wHe0/fU73LEJvS+WAkKe+vXzqD05itcuZgJfwg3Uwv JW88zZA+n+O4Jn5+exNdgkiwbeY/OkAieWs+5v8V9bPdg6xT7dnVLL4IfIz+rAq3 5dfIaxElZG22N96IHJuiM84wMNU4/lKgBPTnJUgyaL8Iiq/Mj3q4AgdiCTWViG+Z PtixiXs1QAmkg1XvxGizqBQKdhfKrXXsBY8nd/RBQYw10kvolCLLkx3BxNGWZd1g QP0/79WSTkzaECRTEtgniNN4kU/6oHBTZlvD8lXV7+s8I9l+WDvYcLpn/M7FHDtQ Ptazqy6T808shcSm4AcI7yeRoI/XfO7swxmi+H6yFst4d/r9pFbCYl74QIgY6ol4 KHkQTjNQzpO4iyyusLK04yC+gJV6Ct1BvGS/fykv0lSCXDfCwGgEKPDrDwvkkxIe 1d/Nee/nM442c2YFP0stRIwAxVSRXA8MjM2vQuAVDvLznrpzAtDNZ/HRAfztvfYk 3T7B5U/BNzFonRwy9ZFpzHrdmWOVvBXozYxbIEJ2+HfIFX+J5PAXgVF+XMXK5aw9 F8KXMxYnDSIWe9K9teEG =FSyv -----END PGP SIGNATURE----- --75WsOQSofUOhcSOp--