From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35179) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a6nrS-0002KE-KB for qemu-devel@nongnu.org; Wed, 09 Dec 2015 18:09:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a6nrN-0004fr-Hk for qemu-devel@nongnu.org; Wed, 09 Dec 2015 18:09:26 -0500 Received: from mail-qg0-x229.google.com ([2607:f8b0:400d:c04::229]:33454) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a6nrN-0004fZ-9b for qemu-devel@nongnu.org; Wed, 09 Dec 2015 18:09:21 -0500 Received: by qgea14 with SMTP id a14so106875352qge.0 for ; Wed, 09 Dec 2015 15:09:20 -0800 (PST) Date: Wed, 9 Dec 2015 18:09:19 -0500 From: Kevin O'Connor Message-ID: <20151209230918.GA14387@morn.lan> References: <1449187263-4604-1-git-send-email-Andrew.Baumann@microsoft.com> <1449208887-9564-1-git-send-email-Andrew.Baumann@microsoft.com> <1449208887-9564-4-git-send-email-Andrew.Baumann@microsoft.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH 4/8] bcm2835_emmc: add bcm2835 MMC/SD controller List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Peter Maydell , Peter Crosthwaite , Igor Mitsyanko , Stefan Weil , =?iso-8859-1?Q?Gr=E9gory?= ESTRADE , "qemu-devel@nongnu.org Developers" , Andrew Baumann , "qemu-arm@nongnu.org" , Paolo Bonzini On Wed, Dec 09, 2015 at 10:54:38AM -0800, Peter Crosthwaite wrote: > On Wed, Dec 9, 2015 at 10:17 AM, Andrew Baumann > wrote: > >> From: Peter Crosthwaite [mailto:crosthwaitepeter@gmail.com] > >> Sent: Tuesday, 8 December 2015 23:40 > >> On Tue, Dec 8, 2015 at 10:19 PM, Andrew Baumann > >> wrote: > >> >> From: Peter Crosthwaite [mailto:crosthwaitepeter@gmail.com] > >> > I do not observe this behaviour on the real Pi2 (and it breaks UEFI). The > >> hardware semantics appear to be "if the command generates a response, > >> but you didn't want to see it, we'll successfully complete the command and > >> ignore the response", whereas the sdhci implementation raises an error for > >> this as well as signalling completion. I have read the "SD Specifications Part A2 > >> SD Host Controller Simplified Specification Version 2.00", but did not find > >> anything describing this case, so it could be that this is open to interpretation. > >> (It could also be specified in SDHC v3.) The specific error also seems odd -- my > >> understanding is that a "command index" error means that the index in the > >> response didn't match the index of the issued command, but that's hardly > >> what is happening here. FYI the SDHCI v3 spec is available online. Confusingly, it's listed as an addendum instead of explicitly as the sdhci spec. The file is partA2_300.pdf . -Kevin