From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46109) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9s7h-00020e-50 for qemu-devel@nongnu.org; Fri, 18 Dec 2015 05:18:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a9s7d-0001d7-Qb for qemu-devel@nongnu.org; Fri, 18 Dec 2015 05:18:53 -0500 Received: from e06smtp09.uk.ibm.com ([195.75.94.105]:42622) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9s7d-0001d1-Hc for qemu-devel@nongnu.org; Fri, 18 Dec 2015 05:18:49 -0500 Received: from localhost by e06smtp09.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 18 Dec 2015 10:18:48 -0000 From: Greg Kurz Date: Fri, 18 Dec 2015 11:18:45 +0100 Message-ID: <20151218101844.26409.23426.stgit@bahia.huguette.org> In-Reply-To: <20151218101815.26409.55642.stgit@bahia.huguette.org> References: <20151218101815.26409.55642.stgit@bahia.huguette.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 2/7] target-ppc: rename and export maybe_bswap_register() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Paolo Bonzini , qemu-ppc@nongnu.org, Anton Blanchard , qemu-devel@nongnu.org This helper will be used to support FP, Altivec and VSX registers when the guest is little-endian. Signed-off-by: Greg Kurz --- target-ppc/cpu.h | 1 + target-ppc/gdbstub.c | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 9706000f8bf1..1e2516e071b7 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -2355,4 +2355,5 @@ int ppc_get_vcpu_dt_id(PowerPCCPU *cpu); */ PowerPCCPU *ppc_get_vcpu_by_dt_id(int cpu_dt_id); +void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len); #endif /* !defined (__CPU_PPC_H__) */ diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c index 14675f45653d..b20bb0c80ef3 100644 --- a/target-ppc/gdbstub.c +++ b/target-ppc/gdbstub.c @@ -88,7 +88,7 @@ static int ppc_gdb_register_len(int n) the proper ordering for the binary, and cannot be changed. For system mode, TARGET_WORDS_BIGENDIAN is always set, and we must check the current mode of the chip to see if we're running in little-endian. */ -static void maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) +void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) { #ifndef CONFIG_USER_ONLY if (!msr_le) { @@ -158,7 +158,7 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) break; } } - maybe_bswap_register(env, mem_buf, r); + ppc_maybe_bswap_register(env, mem_buf, r); return r; } @@ -214,7 +214,7 @@ int ppc_cpu_gdb_read_register_apple(CPUState *cs, uint8_t *mem_buf, int n) break; } } - maybe_bswap_register(env, mem_buf, r); + ppc_maybe_bswap_register(env, mem_buf, r); return r; } @@ -227,7 +227,7 @@ int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) if (!r) { return r; } - maybe_bswap_register(env, mem_buf, r); + ppc_maybe_bswap_register(env, mem_buf, r); if (n < 32) { /* gprs */ env->gpr[n] = ldtul_p(mem_buf); @@ -277,7 +277,7 @@ int ppc_cpu_gdb_write_register_apple(CPUState *cs, uint8_t *mem_buf, int n) if (!r) { return r; } - maybe_bswap_register(env, mem_buf, r); + ppc_maybe_bswap_register(env, mem_buf, r); if (n < 32) { /* gprs */ env->gpr[n] = ldq_p(mem_buf);