Re: [Qemu-devel] [PATCH] hw/pci: do not update the PCI mappings while Decode (I/O or memory) bit is not set in the Command register

["Michael S. Tsirkin" <mst@redhat.com>]

On Thu, Jan 14, 2016 at 05:23:27PM +0200, Marcel Apfelbaum wrote:
> On 01/14/2016 04:49 PM, Michael S. Tsirkin wrote:
> >On Thu, Jan 14, 2016 at 03:30:41PM +0100, Laszlo Ersek wrote:
> >>>2. The same as with pxb, disable Integrated End points for pxb-pcie.
> >>
> >>My vote, without a doubt.
> >
> >Yea, me too.
> >
> >
> >On a related note: I wonder whether enough resources will be allocated
> >to the bridge to actually make it possible to add devices by hotplug
> >later.
> >
> 
> It works the same as with PXB, but now instead of having one internal PCI-bridge,
> we will have several switches/root ports. Each of them will get the minimum MEM required by
> PCI bridges,

what does this mean? What if you add a bunch of devices
with large memory BARs? They won't fit will they?

> however the IO will be allocated only if at least one legacy device
> will be present at boot time. (this is at least what SeaBIOS does, I am going to check OVMF actions)
> 
> Also related, checking that PCIe native hotplug works for devices behind
> pxb-pcie bridges is my next step after I fix the current issue.
> 
> Thanks,
> Marcel
> 
> >
> >>>
> >>>I am going to look at 1., maybe I is doable in a clean way.
> >>
> >>My vote: don't. :)
> >>
> >>Thanks
> >>Laszlo
> >>
> >>>Thanks,
> >>>Marcel
> >>>
> >>>
> >>>[...]