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Date: Thu, 14 Jan 2016 17:39:17 +0200
From: "Michael S. Tsirkin" <mst@redhat.com>
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Subject: Re: [Qemu-devel] [V3 3/4] hw/i386: ACPI table for AMD IO MMU
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To: David kiarie <davidkiarie4@gmail.com>
Cc: marcel@redhat.com, Valentine Sinitsyn <valentine.sinitsyn@gmail.com>, Peter Crosthwaite <crosthwaitepeter@gmail.com>, Jan Kiszka <jan.kiszka@web.de>, QEMU Developers <qemu-devel@nongnu.org>

On Thu, Jan 14, 2016 at 03:15:38PM +0300, David kiarie wrote:
> On Thu, Jan 14, 2016 at 1:09 PM, Michael S. Tsirkin <mst@redhat.com> wrote:
> > On Thu, Jan 14, 2016 at 11:04:27AM +0300, David Kiarie wrote:
> >> Add IVRS table for AMD IO MMU. Also reverve MMIO
> >
> > reserve?
> 
> Yeah, typo.
> 
> >
> >> region for IO MMU via ACPI
> >
> >
> > It does not look like you reserve anything.
> >
> > Pls add a link to hardware spec (in
> > the device implementation) so we can check
> > what does real hardware do.
> >
> > If this is it:
> > http://developer.amd.com/wordpress/media/2012/10/488821.pdf
> >
> > then the way that works seems to be by guest
> > programming the MMIO base.
> > We should do the same: patch seabios and EFI to do this.
> 
> Yes, that's the spec.
> 
> We thought this could be possible via ACPI (without patching BIOS ), no ?

I don't see how. We should do it the way it happens on real hardware.

-- 
MST