From: Stefan Hajnoczi <stefanha@redhat.com>
To: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org, rth@twiddle.net
Subject: Re: [Qemu-devel] [RFC 0/1] riscv: Add full-system emulation support for the RISC-V Instruction Set Architecture (RV64G)
Date: Fri, 19 Feb 2016 17:18:43 +0000 [thread overview]
Message-ID: <20160219171843.GD16902@stefanha-x1.localdomain> (raw)
In-Reply-To: <1455843725-88869-1-git-send-email-sagark@eecs.berkeley.edu>
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On Thu, Feb 18, 2016 at 05:02:04PM -0800, Sagar Karandikar wrote:
> With this RFC, I mainly wanted to get input on the overall design of the target
> implementation, as well as see if any regular contributors would be interested
> in co-mentoring RISC-V related projects for QEMU's Google Summer of Code with
> me.
RISC-V GSoC is a great idea! It's an exciting new architecture and I'm
sure students would like to participate.
Getting some of your own patches merged will help. That way the student
can also upstream their code.
I'm not familiar enough with TCG to act as co-mentor on this project but
I hope another regular QEMU contributor is interested.
Stefan
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next prev parent reply other threads:[~2016-02-19 17:18 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-19 1:02 [Qemu-devel] [RFC 0/1] riscv: Add full-system emulation support for the RISC-V Instruction Set Architecture (RV64G) Sagar Karandikar
2016-02-19 1:02 ` [Qemu-devel] [RFC 1/1] " Sagar Karandikar
2016-02-19 13:18 ` [Qemu-devel] [RFC 0/1] " Stefan Hajnoczi
2016-02-19 13:22 ` Peter Maydell
2016-02-19 17:18 ` Stefan Hajnoczi [this message]
2016-02-23 21:02 ` Richard Henderson
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