Re: [Qemu-devel] [V6 0/4] AMD IOMMU

["Michael S. Tsirkin" <mst@redhat.com>]

On Sun, Feb 21, 2016 at 09:10:56PM +0300, David Kiarie wrote:
> Hello there,
> 
> Repost, AMD IOMMU patches version 6.
> 
> Changes since version 5
>  -Fixed macro formating issues
>  -changed occurences of IO MMU to IOMMU for consistency
>  -Fixed capability registers duplication
>  -Rebased to current master
> 
> David Kiarie (4):
>   hw/i386: Introduce AMD IOMMU
>   hw/core: Add AMD IOMMU to machine properties
>   hw/i386: ACPI table for AMD IOMMU
>   hw/pci-host: Emulate AMD IOMMU

I went over AMD IOMMU spec.
I'm concerned that it appears that there's no chance for it to
work correctly if host caches invalid PTE entries.

The spec vaguely discusses write-protecting such PTEs but
that would be very complex if it can be made to work at all.

This means that this can't work with e.g. VFIO.
It can only work with emulated devices.

OTOH VTD can easily support PTE shadowing by setting a flag.

I'd like us to find some way to avoid possibility
of user error creating a configuration mixing e.g.
vfio with the amd iommu.

I'm not sure how to do this.

Any idea?


>  hw/core/machine.c             |   28 +-
>  hw/i386/Makefile.objs         |    1 +
>  hw/i386/acpi-build.c          |  208 +++++-
>  hw/i386/amd_iommu.c           | 1432 +++++++++++++++++++++++++++++++++++++++++
>  hw/i386/amd_iommu.h           |  395 ++++++++++++
>  hw/pci-host/piix.c            |    1 +
>  hw/pci-host/q35.c             |   14 +-
>  include/hw/acpi/acpi-defs.h   |   55 ++
>  include/hw/boards.h           |    3 +-
>  include/hw/i386/intel_iommu.h |    1 +
>  include/hw/pci/pci.h          |    2 +
>  qemu-options.hx               |    6 +-
>  util/qemu-config.c            |    4 +-
>  13 files changed, 2123 insertions(+), 27 deletions(-)
>  create mode 100644 hw/i386/amd_iommu.c
>  create mode 100644 hw/i386/amd_iommu.h
> 
> -- 
> 2.1.4