From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51533) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aar5P-00073U-95 for qemu-devel@nongnu.org; Tue, 01 Mar 2016 15:40:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aar5K-00029p-8x for qemu-devel@nongnu.org; Tue, 01 Mar 2016 15:40:03 -0500 Received: from mx1.redhat.com ([209.132.183.28]:48709) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aar5K-00029i-3e for qemu-devel@nongnu.org; Tue, 01 Mar 2016 15:39:58 -0500 Date: Tue, 1 Mar 2016 22:39:54 +0200 From: "Michael S. Tsirkin" Message-ID: <20160301223551-mutt-send-email-mst@redhat.com> References: <1456078260-6669-1-git-send-email-davidkiarie4@gmail.com> <20160301134419-mutt-send-email-mst@redhat.com> <56D59DA3.3040002@siemens.com> <56D5A069.9030004@siemens.com> <20160301220139-mutt-send-email-mst@redhat.com> <56D5F8F6.2000001@siemens.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <56D5F8F6.2000001@siemens.com> Subject: Re: [Qemu-devel] [V6 0/4] AMD IOMMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: valentine.sinitsyn@gmail.com, marcel@redhat.com, David Kiarie , qemu-devel@nongnu.org On Tue, Mar 01, 2016 at 09:17:58PM +0100, Jan Kiszka wrote: > On 2016-03-01 21:11, Michael S. Tsirkin wrote: > > On Tue, Mar 01, 2016 at 03:00:09PM +0100, Jan Kiszka wrote: > >> On 2016-03-01 14:48, Jan Kiszka wrote: > >>> There is likely no way around write-protecting the IOMMU page tables (in > >>> KVM mode) once we evaluated and cached them somewhere. > >> > >> I mean, when in kvm mode AND having something that caches enabled, of > >> course. > > > > Just write-protecting won't be enough either, since > > the moment you remove the protection, all bets are off, > > and if you don't, guest will start from the same point > > when you re-enter and fault again. > > We would not remove protection as long as the entry is in use by the > IOMMU. There should be no difference from shadow MMU logic here: trap > and emulate the write. Oh that's a nice trick. So you only write-protect it when you detect that a range was invalidated. Unfortunately it has page granularity so a single invalid PTE causes faults for writes to all others sharing a page with it. > > > > What this seems to call for is a new kind of protection > > where yes PTE is write protected, but instead of > > making PTE writeable (or killing guest) > > KVM handles it as an MMIO: emulates the write and then skips the instruction. > > > > Emulation can be in kernel, just writing into guest memory > > on behalf of the guest - with some kind of notifier > > to flush the vfio cache - or instead it can exit to userspace > > and have QEMU handle it like MMIO and write into guest memory. > > Exactly, but that's nothing new, is it? It's "just" slow, like other > shadow MMUs. > > Jan Well AFAIK KVM does not have such an option ATM: MMIO causes exits for reads and writes. We want MMIO exits for writes but not reads. I agree it should be easy to implement. > -- > Siemens AG, Corporate Technology, CT RDA ITP SES-DE > Corporate Competence Center Embedded Linux