Re: [Qemu-devel] [V6 0/4] AMD IOMMU

["Michael S. Tsirkin" <mst@redhat.com>]

On Tue, Mar 01, 2016 at 10:23:55PM +0100, Jan Kiszka wrote:
> On 2016-03-01 21:39, Michael S. Tsirkin wrote:
> > On Tue, Mar 01, 2016 at 09:17:58PM +0100, Jan Kiszka wrote:
> >> On 2016-03-01 21:11, Michael S. Tsirkin wrote:
> >>>
> >>> What this seems to call for is a new kind of protection
> >>> where yes PTE is write protected, but instead of
> >>> making PTE writeable (or killing guest)
> >>> KVM handles it as an MMIO: emulates the write and then skips the instruction.
> >>>
> >>> Emulation can be in kernel, just writing into guest memory
> >>> on behalf of the guest - with some kind of notifier
> >>> to flush the vfio cache - or instead it can exit to userspace
> >>> and have QEMU handle it like MMIO and write into guest memory.
> >>
> >> Exactly, but that's nothing new, is it? It's "just" slow, like other
> >> shadow MMUs.
> >>
> >> Jan
> > 
> > Well AFAIK KVM does not have such an option ATM: MMIO causes exits for
> > reads and writes.  We want MMIO exits for writes but not reads.
> > I agree it should be easy to implement.
> 
> We have read-only memory slot support for quite a while. It's used to
> support execute (and read) from emulated ROM devices.
> 
> Jan

I didn't realize this causes an mmio exit.

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