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From: David Gibson <david@gibson.dropbear.id.au>
To: Thomas Huth <thuth@redhat.com>
Cc: "Cédric Le Goater" <clg@fr.ibm.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 16/17] ppc: Add dummy CIABR SPR
Date: Thu, 17 Mar 2016 09:28:46 +1100	[thread overview]
Message-ID: <20160316222846.GH9032@voom> (raw)
In-Reply-To: <56E8FC01.4040700@redhat.com>

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On Wed, Mar 16, 2016 at 07:24:01AM +0100, Thomas Huth wrote:
> On 16.03.2016 02:14, David Gibson wrote:
> > On Mon, Mar 14, 2016 at 05:56:39PM +0100, Cédric Le Goater wrote:
> >> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> >>
> >> We should implement HW breakpoint/watchpoint, qemu supports them...
> >>
> >> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > 
> > Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> > 
> > But I'm assuming 2.7, not 2.6.
> 
> Looks like this register can be set by the guest using the H_SET_MODE
> hypercall, too (search for H_SET_MODE_RESOURCE_SET_CIABR in the KVM
> kernel sources), similar to the DAWR register.
> And this patch is using KVM_REG_PPC_CIABR to link this register with the
> KVM code in the kernel ... so I think this patch should still go into
> 2.6 to make sure that the register is migrated properly.

Good point, not sure how I missed that.

> 
>  Thomas
> 
> >> ---
> >>  target-ppc/cpu.h            | 1 +
> >>  target-ppc/translate_init.c | 5 +++++
> >>  2 files changed, 6 insertions(+)
> >>
> >> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> >> index 5203cc6a3bfb..9e1ef10b7dc6 100644
> >> --- a/target-ppc/cpu.h
> >> +++ b/target-ppc/cpu.h
> >> @@ -1400,6 +1400,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch)
> >>  #define SPR_DAWR              (0x0B4)
> >>  #define SPR_MPPR              (0x0B8)
> >>  #define SPR_RPR               (0x0BA)
> >> +#define SPR_CIABR             (0x0BB)
> >>  #define SPR_DAWRX             (0x0BC)
> >>  #define SPR_HFSCR             (0x0BE)
> >>  #define SPR_VRSAVE            (0x100)
> >> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> >> index cfb1bc088950..f88bdf7b3cd1 100644
> >> --- a/target-ppc/translate_init.c
> >> +++ b/target-ppc/translate_init.c
> >> @@ -7603,6 +7603,11 @@ static void gen_spr_book3s_207_dbg(CPUPPCState *env)
> >>                          SPR_NOACCESS, SPR_NOACCESS,
> >>                          &spr_read_generic, &spr_write_generic,
> >>                          KVM_REG_PPC_DAWRX, 0x00000000);
> >> +    spr_register_kvm_hv(env, SPR_CIABR, "CIABR",
> >> +                        SPR_NOACCESS, SPR_NOACCESS,
> >> +                        SPR_NOACCESS, SPR_NOACCESS,
> >> +                        &spr_read_generic, &spr_write_generic,
> >> +                        KVM_REG_PPC_CIABR, 0x00000000);
> >>  }
> >>  
> >>  static void gen_spr_970_dbg(CPUPPCState *env)
> > 
> 
> 



-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2016-03-16 22:52 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-14 16:56 [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing Cédric Le Goater
2016-03-14 16:56 ` [Qemu-devel] [PATCH 01/17] ppc: Update SPR definitions Cédric Le Goater
2016-03-14 18:34   ` Thomas Huth
2016-03-14 16:56 ` [Qemu-devel] [PATCH 02/17] ppc: Add macros to register hypervisor mode SPRs Cédric Le Goater
2016-03-14 18:50   ` Thomas Huth
2016-03-14 16:56 ` [Qemu-devel] [PATCH 03/17] ppc: Add a bunch of hypervisor SPRs to Book3s Cédric Le Goater
2016-03-14 19:14   ` Thomas Huth
2016-03-15  9:43     ` David Gibson
2016-03-15 10:49       ` Thomas Huth
2016-03-15 17:04         ` [Qemu-devel] [Qemu-ppc] " Cédric Le Goater
2016-03-16  1:04         ` [Qemu-devel] " David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 04/17] ppc: Add number of threads per core to the processor definition Cédric Le Goater
2016-03-14 19:20   ` Thomas Huth
2016-03-15  8:06     ` Cédric Le Goater
2016-03-15  8:21     ` Bharata B Rao
2016-03-15  9:45   ` David Gibson
2016-03-15 21:11     ` Benjamin Herrenschmidt
2016-03-16  0:41       ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 05/17] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV Cédric Le Goater
2016-03-14 19:29   ` Thomas Huth
2016-03-15  9:47     ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 06/17] ppc: Create cpu_ppc_set_papr() helper Cédric Le Goater
2016-03-17  2:34   ` David Gibson
2016-03-17 12:33     ` Cédric Le Goater
2016-03-17 22:03       ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 07/17] ppc: Better figure out if processor has HV mode Cédric Le Goater
2016-03-16  1:05   ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 08/17] ppc: Add placeholder SPRs for DPDES and DHDES on P8 Cédric Le Goater
2016-03-14 19:32   ` Thomas Huth
2016-03-16  1:06   ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 09/17] ppc: SPURR & PURR are HV writeable and privileged Cédric Le Goater
2016-03-14 19:37   ` Thomas Huth
2016-03-16  1:07     ` David Gibson
2016-03-16  1:07   ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 10/17] ppc: Add dummy SPR_IC for POWER8 Cédric Le Goater
2016-03-14 19:40   ` Thomas Huth
2016-03-16  1:08   ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 11/17] ppc: Initialize AMOR in PAPR mode Cédric Le Goater
2016-03-14 20:13   ` Thomas Huth
2016-03-16  1:09   ` David Gibson
2016-03-17  2:36   ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 12/17] ppc: Fix writing to AMR/UAMOR Cédric Le Goater
2016-03-14 20:26   ` Thomas Huth
2016-03-15  8:05     ` Cédric Le Goater
2016-03-14 16:56 ` [Qemu-devel] [PATCH 13/17] ppc: Add POWER8 IAMR register Cédric Le Goater
2016-03-14 20:36   ` Thomas Huth
2016-03-14 16:56 ` [Qemu-devel] [PATCH 14/17] ppc: Add dummy write to VTB Cédric Le Goater
2016-03-14 20:54   ` Thomas Huth
2016-03-14 21:07     ` [Qemu-devel] [Qemu-ppc] " Benjamin Herrenschmidt
2016-03-16  1:12   ` [Qemu-devel] " David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 15/17] ppc: Add dummy POWER8 MPPR register Cédric Le Goater
2016-03-16  1:14   ` David Gibson
2016-03-16  6:17     ` Thomas Huth
2016-03-16  9:24       ` Cédric Le Goater
2016-03-14 16:56 ` [Qemu-devel] [PATCH 16/17] ppc: Add dummy CIABR SPR Cédric Le Goater
2016-03-14 20:00   ` Thomas Huth
2016-03-16  1:14   ` David Gibson
2016-03-16  6:24     ` Thomas Huth
2016-03-16 22:28       ` David Gibson [this message]
2016-03-14 16:56 ` [Qemu-devel] [PATCH 17/17] ppc: A couple more dummy POWER8 Book4 regs Cédric Le Goater
2016-03-14 20:08   ` Thomas Huth
2016-03-16  1:15   ` David Gibson
2016-03-15  0:39 ` [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing David Gibson
2016-03-15  8:11   ` Cédric Le Goater
2016-03-16  1:19     ` David Gibson
2016-03-16  9:08       ` Cédric Le Goater
2016-03-17  2:45         ` David Gibson
2016-03-17 14:28           ` Cédric Le Goater
2016-03-21  0:59             ` David Gibson

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