From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39283) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ahqEs-0003L2-F5 for qemu-devel@nongnu.org; Sun, 20 Mar 2016 23:10:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ahqEr-0006hU-9V for qemu-devel@nongnu.org; Sun, 20 Mar 2016 23:10:42 -0400 Date: Mon, 21 Mar 2016 14:08:12 +1100 From: David Gibson Message-ID: <20160321030812.GD23586@voom.redhat.com> References: <1458134034-32500-9-git-send-email-clg@fr.ibm.com> <1458151025-9399-1-git-send-email-clg@fr.ibm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="g7w8+K/95kPelPD2" Content-Disposition: inline In-Reply-To: <1458151025-9399-1-git-send-email-clg@fr.ibm.com> Subject: Re: [Qemu-devel] [PATCH v3 08/10] ppc: Add POWER8 IAMR register List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-1?Q?C=E9dric?= Le Goater Cc: Thomas Huth , qemu-ppc@nongnu.org, qemu-devel@nongnu.org --g7w8+K/95kPelPD2 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Mar 16, 2016 at 06:57:05PM +0100, C=E9dric Le Goater wrote: > From: Benjamin Herrenschmidt >=20 > With appropriate AMR-like masks. Not actually used by the translation > logic at that point >=20 > Signed-off-by: Benjamin Herrenschmidt > [clg: changed spr_register_hv(SPR_IAMR) to spr_register_kvm_hv(SPR_IAMR) > changed gen_spr_amr() prototype ] > Signed-off-by: C=E9dric Le Goater Reviewed-by: David Gibson > --- >=20 > Changes since v2: >=20 > - fixed has_iamr condition in gen_spr_amr() >=20 > target-ppc/cpu.h | 1 + > target-ppc/translate_init.c | 41 +++++++++++++++++++++++++++++++++++++++= -- > 2 files changed, 40 insertions(+), 2 deletions(-) >=20 > diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h > index 167c73f863b3..a3c4fb112a3e 100644 > --- a/target-ppc/cpu.h > +++ b/target-ppc/cpu.h > @@ -1360,6 +1360,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, = bool ifetch) > #define SPR_BOOKE_CSRR0 (0x03A) > #define SPR_BOOKE_CSRR1 (0x03B) > #define SPR_BOOKE_DEAR (0x03D) > +#define SPR_IAMR (0x03D) > #define SPR_BOOKE_ESR (0x03E) > #define SPR_BOOKE_IVPR (0x03F) > #define SPR_MPC_EIE (0x050) > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index 4514188ff07c..c78b532e8f3c 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -1126,9 +1126,39 @@ static void spr_write_uamor(DisasContext *ctx, int= sprn, int gprn) > tcg_temp_free(t1); > tcg_temp_free(t2); > } > + > +static void spr_write_iamr(DisasContext *ctx, int sprn, int gprn) > +{ > + TCGv t0 =3D tcg_temp_new(); > + TCGv t1 =3D tcg_temp_new(); > + TCGv t2 =3D tcg_temp_new(); > + > + /* Note, the HV=3D1 case is handled earlier by simply using > + * spr_write_generic for HV mode in the SPR table > + */ > + > + /* Build insertion mask into t1 based on context */ > + gen_load_spr(t1, SPR_AMOR); > + > + /* Mask new bits into t2 */ > + tcg_gen_and_tl(t2, t1, cpu_gpr[gprn]); > + > + /* Load AMR and clear new bits in t0 */ > + gen_load_spr(t0, SPR_IAMR); > + tcg_gen_andc_tl(t0, t0, t1); > + > + /* Or'in new bits and write it out */ > + tcg_gen_or_tl(t0, t0, t2); > + gen_store_spr(SPR_IAMR, t0); > + spr_store_dump_spr(SPR_IAMR); > + > + tcg_temp_free(t0); > + tcg_temp_free(t1); > + tcg_temp_free(t2); > +} > #endif /* CONFIG_USER_ONLY */ > =20 > -static void gen_spr_amr (CPUPPCState *env) > +static void gen_spr_amr(CPUPPCState *env, bool has_iamr) > { > #ifndef CONFIG_USER_ONLY > /* Virtual Page Class Key protection */ > @@ -1154,6 +1184,13 @@ static void gen_spr_amr (CPUPPCState *env) > SPR_NOACCESS, SPR_NOACCESS, > &spr_read_generic, &spr_write_generic, > 0); > + if (has_iamr) { > + spr_register_kvm_hv(env, SPR_IAMR, "IAMR", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_iamr, > + &spr_read_generic, &spr_write_generic, > + KVM_REG_PPC_IAMR, 0); > + } > #endif /* !CONFIG_USER_ONLY */ > } > #endif /* TARGET_PPC64 */ > @@ -8000,7 +8037,7 @@ static void init_proc_book3s_64(CPUPPCState *env, i= nt version) > case BOOK3S_CPU_POWER7: > case BOOK3S_CPU_POWER8: > gen_spr_book3s_ids(env); > - gen_spr_amr(env); > + gen_spr_amr(env, version >=3D BOOK3S_CPU_POWER8); > gen_spr_book3s_purr(env); > env->ci_large_pages =3D true; > break; --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --g7w8+K/95kPelPD2 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJW72WcAAoJEGw4ysog2bOSnBoQAK7d12qzpEsfPK3dmZJgGNJy gpbvZ0TJ6r7EYR/GiU6JGmG2ZObsxU3wWeVHFcxaa0/JIl46/Hs5w/Pbman6xMV9 4RNdtmGuV91DXMGgb1u3K/dvsuFdwoCsCWge2717Sa96OEvUPxlB59YVLPoOJuc9 3QZEbwksrzwzmfzqBORuffwfT+oQCiHeettygaZpSuV0APCIuA1M2M0LKyrZ7dXQ 1jPy9hxSSmubDab2EbNWD8iiqIJfZnBJweVrt3kV8SwyeMReK7qrveDtuwKTJSC/ PWdCS6FcH6i2GeR8TN4I3WHENElDhsMDv3H4GKcjp9tzhWaEZc50rZlAHzvw39d0 2bNkO3BYm+4tXYF2WYtnmFewdp/NJDYSAl68c77K8ysGklGjixVHYJ6aGLhqar9E CG6ZVke3WxHt1F6PGJqY2Nf6bpJ1yC7HogtiIhnJ5BFaIcVjIFi95DuGUT3Fgfqx oTakkQLSUvgjTAwcLiu0aK/wmOFuD0Dhkh9B7vWf7aEEyxdNBkN8fcFGPsufbvWX 1WiixpcKW2JFeGAZxhJ+qi9Z1C9z0cAlq1rmH8eJg5caleJGwUO5/0sE/CGzDge4 Yt4k5tgqS94TzwnpiIsqEgMQuVz5cfEqrzIlmqZsmqER2fueHaB9Az5rHp8ZJ2oZ 8FQE0bU5J1FQtBI78zwq =oxvC -----END PGP SIGNATURE----- --g7w8+K/95kPelPD2--