From: "Emilio G. Cota" <cota@braap.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: mttcg@listserver.greensocs.com,
"Peter Crosthwaite" <crosthwaite.peter@gmail.com>,
"Mark Burton" <mark.burton@greensocs.com>,
"Alvise Rigo" <a.rigo@virtualopensystems.com>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Sergey Fedorov" <serge.fdrv@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"KONRAD Frédéric" <fred.konrad@greensocs.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Andreas Färber" <afaerber@suse.de>,
"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [RFC v1 01/11] tcg: move tb_find_fast outside the tb_lock critical section
Date: Mon, 21 Mar 2016 19:59:50 -0400 [thread overview]
Message-ID: <20160321235950.GA9356@flamenco> (raw)
In-Reply-To: <CAFEAcA_OKd7LVX5AKzSHg-pSEeG1Yrc31YRxNsWrF3Wq3RNnfw@mail.gmail.com>
On Mon, Mar 21, 2016 at 22:08:06 +0000, Peter Maydell wrote:
> It is not _necessary_, but it is a performance optimization to
> speed up the "missed in the TLB" case. (A TLB flush will wipe
> the tb_jmp_cache table.) From the thread where the move-to-front-of-list
> behaviour was added in 2010, benefits cited:
(snip)
> I think what's happening here is that for guest CPUs where TLB
> invalidation happens fairly frequently (notably ARM, because
> we don't model ASIDs in the QEMU TLB and thus have to flush
> the TLB on any context switch) the case of "we didn't hit in
> the TLB but we do have this TB and it was used really recently"
> happens often enough to make it worthwhile for the
> tb_find_physical() code to keep its hash buckets in LRU order.
>
> Obviously that's all five year old data now, so a pinch of
> salt may be indicated, but I'd rather we didn't just remove
> the optimisation without some benchmarking to check that it's
> not significant. A 2x difference is huge.
Good point. Most of my tests have been on x86-on-x86, and the
difference there (for many CPU-intensive benchmarks such as SPEC) was
negligible.
Just tested the current master booting Alex' debian ARM image, without
LRU, and I see a 20% increase in boot time.
I'll add per-bucket locks to keep the same behaviour without hurting
scalability.
Thanks,
Emilio
next prev parent reply other threads:[~2016-03-21 23:57 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-18 16:18 [Qemu-devel] [RFC v1 00/11] Base enabling patches for MTTCG Alex Bennée
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 01/11] tcg: move tb_find_fast outside the tb_lock critical section Alex Bennée
2016-03-18 16:54 ` Paolo Bonzini
2016-03-21 21:50 ` Emilio G. Cota
2016-03-21 22:08 ` Peter Maydell
2016-03-21 23:59 ` Emilio G. Cota [this message]
2016-03-22 8:29 ` Paolo Bonzini
2016-03-22 11:59 ` Alex Bennée
2016-03-22 11:55 ` Alex Bennée
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 02/11] cpu-exec: elide more icount code if CONFIG_USER_ONLY Alex Bennée
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 03/11] tcg: comment on which functions have to be called with tb_lock held Alex Bennée
2016-03-18 16:59 ` Paolo Bonzini
2016-03-21 21:50 ` Emilio G. Cota
2016-03-21 22:12 ` Paolo Bonzini
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 04/11] tcg: protect TBContext with tb_lock Alex Bennée
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 05/11] target-arm/psci.c: wake up sleeping CPUs Alex Bennée
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 06/11] tcg: cpus rm tcg_exec_all() Alex Bennée
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 07/11] tcg: add options for enabling MTTCG Alex Bennée
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 08/11] tcg: add kick timer for single-threaded vCPU emulation Alex Bennée
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 09/11] tcg: drop global lock during TCG code execution Alex Bennée
2016-03-18 16:49 ` Paolo Bonzini
2016-03-23 9:19 ` KONRAD Frederic
2016-03-23 16:27 ` Alex Bennée
2016-03-23 20:36 ` Jan Kiszka
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 10/11] tcg: grab iothread lock in cpu-exec interrupt handling Alex Bennée
2016-03-18 16:48 ` Paolo Bonzini
2016-03-22 12:03 ` Alex Bennée
2016-03-18 16:18 ` [Qemu-devel] [RFC v1 11/11] tcg: enable thread-per-vCPU Alex Bennée
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