From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44016) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1anbHA-0000jV-VT for qemu-devel@nongnu.org; Tue, 05 Apr 2016 20:24:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1anbH8-0004dB-RV for qemu-devel@nongnu.org; Tue, 05 Apr 2016 20:24:52 -0400 Received: from e38.co.us.ibm.com ([32.97.110.159]:42937) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1anbH8-0004bX-JH for qemu-devel@nongnu.org; Tue, 05 Apr 2016 20:24:50 -0400 Received: from localhost by e38.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 5 Apr 2016 18:24:48 -0600 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Roth In-Reply-To: <1459413561-30745-11-git-send-email-bharata@linux.vnet.ibm.com> References: <1459413561-30745-1-git-send-email-bharata@linux.vnet.ibm.com> <1459413561-30745-11-git-send-email-bharata@linux.vnet.ibm.com> Message-ID: <20160405234716.589.89901@loki> Date: Tue, 05 Apr 2016 18:47:16 -0500 Subject: Re: [Qemu-devel] [RFC PATCH v2.1 10/12] spapr: CPU hotplug support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bharata B Rao , qemu-devel@nongnu.org Cc: mjrosato@linux.vnet.ibm.com, thuth@redhat.com, pkrempa@redhat.com, ehabkost@redhat.com, aik@ozlabs.ru, armbru@redhat.com, agraf@suse.de, borntraeger@de.ibm.com, qemu-ppc@nongnu.org, pbonzini@redhat.com, imammedo@redhat.com, afaerber@suse.de, david@gibson.dropbear.id.au Quoting Bharata B Rao (2016-03-31 03:39:19) > Set up device tree entries for the hotplugged CPU core and use the > exising RTAS event logging infrastructure to send CPU hotplug notification > to the guest. > = > Signed-off-by: Bharata B Rao > --- > hw/ppc/spapr.c | 58 ++++++++++++++++++++++++++++++++++ > hw/ppc/spapr_cpu_core.c | 70 +++++++++++++++++++++++++++++++++++= ++++++ > hw/ppc/spapr_events.c | 3 ++ > hw/ppc/spapr_rtas.c | 24 ++++++++++++++ > include/hw/ppc/spapr.h | 2 ++ > include/hw/ppc/spapr_cpu_core.h | 2 ++ > 6 files changed, 159 insertions(+) > = > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > index 1ead043..1a5dbd9 100644 > --- a/hw/ppc/spapr.c > +++ b/hw/ppc/spapr.c > @@ -603,6 +603,16 @@ static void spapr_populate_cpu_dt(CPUState *cs, void= *fdt, int offset, > size_t page_sizes_prop_size; > uint32_t vcpus_per_socket =3D smp_threads * smp_cores; > uint32_t pft_size_prop[] =3D {0, cpu_to_be32(spapr->htab_shift)}; > + sPAPRDRConnector *drc; > + sPAPRDRConnectorClass *drck; > + int drc_index; > + > + drc =3D spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index); > + if (drc) { > + drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(drc); > + drc_index =3D drck->get_index(drc); > + _FDT((fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_inde= x))); > + } > = > /* Note: we keep CI large pages off for now because a 64K capable gu= est > * provisioned with large pages might otherwise try to map a qemu > @@ -987,6 +997,16 @@ static void spapr_finalize_fdt(sPAPRMachineState *sp= apr, > _FDT(spapr_drc_populate_dt(fdt, 0, NULL, SPAPR_DR_CONNECTOR_TYPE= _LMB)); > } > = > + if (smc->dr_cpu_enabled) { > + int offset =3D fdt_path_offset(fdt, "/cpus"); > + ret =3D spapr_drc_populate_dt(fdt, offset, NULL, > + SPAPR_DR_CONNECTOR_TYPE_CPU); > + if (ret < 0) { > + error_report("Couldn't set up CPU DR device tree properties"= ); > + exit(1); > + } > + } > + > _FDT((fdt_pack(fdt))); > = > if (fdt_totalsize(fdt) > FDT_MAX_SIZE) { > @@ -1622,6 +1642,8 @@ static void spapr_boot_set(void *opaque, const char= *boot_device, > void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **e= rrp) > { > CPUPPCState *env =3D &cpu->env; > + CPUState *cs =3D CPU(cpu); > + int i; > = > /* Set time-base frequency to 512 MHz */ > cpu_ppc_tb_init(env, TIMEBASE_FREQ); > @@ -1646,6 +1668,14 @@ void spapr_cpu_init(sPAPRMachineState *spapr, Powe= rPCCPU *cpu, Error **errp) > } > } > = > + /* Set NUMA node for the added CPUs */ > + for (i =3D 0; i < nb_numa_nodes; i++) { > + if (test_bit(cs->cpu_index, numa_info[i].node_cpu)) { > + cs->numa_node =3D i; > + break; > + } > + } > + > xics_cpu_setup(spapr->icp, cpu); > = > qemu_register_reset(spapr_cpu_reset, cpu); > @@ -1825,6 +1855,11 @@ static void ppc_spapr_init(MachineState *machine) > = > for (i =3D 0; i < spapr_max_cores; i++) { > int core_dt_id =3D i * smt; > + sPAPRDRConnector *drc =3D > + spapr_dr_connector_new(OBJECT(spapr), > + SPAPR_DR_CONNECTOR_TYPE_CPU, core= _dt_id); > + > + qemu_register_reset(spapr_drc_reset, drc); > = > if (i < spapr_cores) { > char *type =3D spapr_get_cpu_core_type(machine->cpu_mode= l); > @@ -2247,6 +2282,27 @@ out: > error_propagate(errp, local_err); > } > = > +void *spapr_populate_hotplug_cpu_dt(CPUState *cs, int *fdt_offset, > + sPAPRMachineState *spapr) > +{ > + PowerPCCPU *cpu =3D POWERPC_CPU(cs); > + DeviceClass *dc =3D DEVICE_GET_CLASS(cs); > + int id =3D ppc_get_vcpu_dt_id(cpu); > + void *fdt; > + int offset, fdt_size; > + char *nodename; > + > + fdt =3D create_device_tree(&fdt_size); > + nodename =3D g_strdup_printf("%s@%x", dc->fw_name, id); > + offset =3D fdt_add_subnode(fdt, 0, nodename); > + > + spapr_populate_cpu_dt(cs, fdt, offset, spapr); > + g_free(nodename); > + > + *fdt_offset =3D offset; > + return fdt; > +} > + > static void spapr_machine_device_plug(HotplugHandler *hotplug_dev, > DeviceState *dev, Error **errp) > { > @@ -2287,6 +2343,8 @@ static void spapr_machine_device_plug(HotplugHandle= r *hotplug_dev, > } > = > spapr_memory_plug(hotplug_dev, dev, node, errp); > + } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) { > + spapr_core_plug(hotplug_dev, dev, errp); > } > } > = > diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c > index 640d143..a9ba843 100644 > --- a/hw/ppc/spapr_cpu_core.c > +++ b/hw/ppc/spapr_cpu_core.c > @@ -18,6 +18,7 @@ > void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, > Error **errp) > { > + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(qdev_get_machine(= )); > sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); > int spapr_max_cores =3D max_cpus / smp_threads; > int index; > @@ -25,6 +26,11 @@ void spapr_core_pre_plug(HotplugHandler *hotplug_dev, = DeviceState *dev, > Error *local_err =3D NULL; > CPUCore *cc =3D CPU_CORE(dev); > = > + if (!smc->dr_cpu_enabled && dev->hotplugged) { > + error_setg(&local_err, "CPU hotplug not supported for this machi= ne"); > + goto out; > + } > + > if (cc->threads !=3D smp_threads) { > error_setg(&local_err, "threads must be %d", smp_threads); > goto out; > @@ -49,6 +55,70 @@ out: > error_propagate(errp, local_err); > } > = > +void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev, > + Error **errp) > +{ > + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(qdev_get_machine(= )); > + sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); > + sPAPRCPUCore *core =3D SPAPR_CPU_CORE(OBJECT(dev)); > + CPUCore *cc =3D CPU_CORE(dev); > + CPUState *cs =3D CPU(&core->threads[0]); > + sPAPRDRConnector *drc; > + sPAPRDRConnectorClass *drck; > + Error *local_err =3D NULL; > + void *fdt =3D NULL; > + int fdt_offset =3D 0; > + int index; > + int smt =3D kvmppc_smt_threads(); > + > + drc =3D spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, cc->co= re); > + index =3D cc->core / smt; > + spapr->cores[index] =3D OBJECT(dev); > + > + if (!smc->dr_cpu_enabled) { > + /* > + * This is a cold plugged CPU core but the machine doesn't suppo= rt > + * DR. So skip the hotplug path ensuring that the core is brought > + * up online with out an associated DR connector. > + */ > + return; > + } > + > + g_assert(drc); > + > + /* > + * Setup CPU DT entries only for hotplugged CPUs. For boot time or > + * coldplugged CPUs DT entries are setup in spapr_finalize_fdt(). > + */ > + if (dev->hotplugged) { > + fdt =3D spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr); > + dev->hotplugged =3D true; This doesn't seem necessary ^