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From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@fr.ibm.com>
Cc: Laurent Vivier <lvivier@redhat.com>,
	peter.maydell@linaro.org, qemu-devel@nongnu.org,
	mdroth@linux.vnet.ibm.com, qemu-ppc@nongnu.org,
	pbonzini@redhat.com
Subject: Re: [Qemu-devel] [Qemu-ppc] [PULL 1/3] ppc: Rework POWER7 & POWER8 exception model
Date: Fri, 8 Apr 2016 11:20:51 +1000	[thread overview]
Message-ID: <20160408012051.GB3332@voom.fritz.box> (raw)
In-Reply-To: <57063616.70109@fr.ibm.com>

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On Thu, Apr 07, 2016 at 12:27:34PM +0200, Cédric Le Goater wrote:
> Hello Laurent,
> 
> On 04/07/2016 11:13 AM, Laurent Vivier wrote:
> > 
> > 
> > On 05/04/2016 04:17, David Gibson wrote:
> >> From: Cédric Le Goater <clg@fr.ibm.com>
> >>
> >> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> >>
> >> This patch fixes the current AIL implementation for POWER8. The
> >> interrupt vector address can be calculated directly from LPCR when the
> >> exception is handled. The excp_prefix update becomes useless and we
> >> can cleanup the H_SET_MODE hcall.
> > 
> > I know it's a little bit late to comment this patch but:
> > 
> > what about the initialization of the NIP in ppc_cpu_reset()?
> > 
> >     env->nip = env->hreset_vector | env->excp_prefix;
> > 
> > on POWER8 "env->excp_prefix" is always 0, but LPCR can have an AIL defined?
> 
> yes. env->spr[SPR_LPCR] still has the previous value at that time and 
> it is reseted right below in the same routine. 
> 
> The cpu should restart in a valid state after that and later on, use the 
> H_SET_MODE hcall from the guest kernel to set the AIL bits back in LPCR. 
> It looks fine to me but I might be missing something.

Right.. it's kind of a case of two bugs cancelling each other out, but
the end result is correct.  The initial NIP should include the AIL
from the LPCR.. but the AIL should be cleared on reset, so it makes no
practical difference.

So in 2.7 it would certainly be good to clean this up for clarity if
nothing else, but I don't see something that needs fixing in the 2.6
timeframe.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  parent reply	other threads:[~2016-04-08  1:21 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-05  2:17 [Qemu-devel] [PULL 0/3] ppc-for-2.6 queue 20160405 David Gibson
2016-04-05  2:17 ` [Qemu-devel] [PULL 1/3] ppc: Rework POWER7 & POWER8 exception model David Gibson
2016-04-05  2:19   ` Benjamin Herrenschmidt
2016-04-05  3:25     ` David Gibson
2016-04-05  7:03       ` Cédric Le Goater
2016-04-05 20:42         ` Benjamin Herrenschmidt
2016-04-07  9:13   ` [Qemu-devel] [Qemu-ppc] " Laurent Vivier
2016-04-07 10:27     ` Cédric Le Goater
2016-04-07 10:45       ` Laurent Vivier
2016-04-07 15:01         ` Cédric Le Goater
2016-04-08  1:22         ` David Gibson
2016-04-08  1:20       ` David Gibson [this message]
2016-04-05  2:17 ` [Qemu-devel] [PULL 2/3] spapr_drc: enable immediate detach for unsignalled devices David Gibson
2016-04-05  2:17 ` [Qemu-devel] [PULL 3/3] vl: Move cpu_synchronize_all_states() into qemu_system_reset() David Gibson
2016-04-05 10:02 ` [Qemu-devel] [PULL 0/3] ppc-for-2.6 queue 20160405 Peter Maydell

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