From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59818) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1arztg-00083T-Ef for qemu-devel@nongnu.org; Sun, 17 Apr 2016 23:30:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1arztc-0006Ek-Ac for qemu-devel@nongnu.org; Sun, 17 Apr 2016 23:30:48 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52932) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1arztc-0006EY-4o for qemu-devel@nongnu.org; Sun, 17 Apr 2016 23:30:44 -0400 Date: Mon, 18 Apr 2016 11:30:37 +0800 From: Peter Xu Message-ID: <20160418033037.GB11521@pxdev.xzpeter.org> References: <1460691099-3024-1-git-send-email-peterx@redhat.com> <1460691099-3024-13-git-send-email-peterx@redhat.com> <20160415153158.GC18429@potion.brq.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20160415153158.GC18429@potion.brq.redhat.com> Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3 12/13] q35: ioapic: add support for split irqchip and irqfd List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Radim =?utf-8?B?S3LEjW3DocWZ?= Cc: qemu-devel@nongnu.org, imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com, mst@redhat.com, pbonzini@redhat.com, jan.kiszka@web.de, alex.williamson@redhat.com, wexu@redhat.com On Fri, Apr 15, 2016 at 05:31:58PM +0200, Radim Kr=C4=8Dm=C3=A1=C5=99 wro= te: > 2016-04-15 11:31+0800, Peter Xu: > > This patch allows Intel IR work with splitted irqchip. Two more field= s > > are added to IOAPICCommonState to support the translation process (Fo= r > > future AMD IR support, we will need to provide another AMD-specific > > callback for int_remap()). In split irqchip mode, IOAPIC is working i= n > > user space, only update kernel irq routes when entry changed. When IR= is > > enabled, we directly update the kernel with translated messages. It > > works just like a kernel cache for the remapping entries. >=20 > (Patches are nice, thanks, I'll be looking how to slap EIM on top.) >=20 > > Since KVM irqfd is using kernel gsi routes to deliver interrupts, as > > long as we can support split irqchip, we will support irqfd as > > well. Also, since kernel gsi routes will cache translated interrupts, > > irqfd delivery will not suffer from any performance impact due to IR. > >=20 > > And, since we supported irqfd, vhost devices will be able to work > > seamlessly with IR now. Logically this should contain both vhost-net = and > > vhost-user case. >=20 > Doesn't look that all callers of kvm_irqchip_update_msi_route() are IR > aware. I think wrapping the remapping around it might be easiest, > kvm_arch_fixup_msi_route() is another candidate. You are right, failed to find this during smoke test. It seems that kvm_arch_fixup_msi_route() is a good place. Thanks! >=20 > > Here we avoided capturing IOMMU IR invalidation, based on the assumpt= ion > > that, guest kernel will always first update IR entry, then IOAPIC > > entry. As long as guest follows this order to update IOAPIC entries, = we > > should be safe. >=20 > The OS configures IOAPIC, MSI and IR independently. e.g. changing the > destination LAPIC only updates IRTE and can happen anytime. > You have to update kvm_irqchip routes when IRTE changes. Thanks to point out. Will add one more patch to do that. -- peterx