From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56228) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1asvkx-0000jx-ET for qemu-devel@nongnu.org; Wed, 20 Apr 2016 13:17:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1asvks-0007IN-V2 for qemu-devel@nongnu.org; Wed, 20 Apr 2016 13:17:39 -0400 Received: from out2-smtp.messagingengine.com ([66.111.4.26]:33587) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1asvks-0007IJ-RH for qemu-devel@nongnu.org; Wed, 20 Apr 2016 13:17:34 -0400 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.nyi.internal (Postfix) with ESMTP id 9675E204FD for ; Wed, 20 Apr 2016 13:17:34 -0400 (EDT) Date: Wed, 20 Apr 2016 13:17:34 -0400 From: "Emilio G. Cota" Message-ID: <20160420171734.GA1124@flamenco> References: <1461107270-19234-1-git-send-email-cota@braap.org> <1461107270-19234-6-git-send-email-cota@braap.org> <57179DE0.5080701@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <57179DE0.5080701@twiddle.net> Subject: Re: [Qemu-devel] [PATCH v3 05/11] qemu-thread: add simple test-and-set spinlock List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: QEMU Developers , MTTCG Devel , Alex =?iso-8859-1?Q?Benn=E9e?= , Paolo Bonzini , Peter Crosthwaite , Peter Maydell , Sergey Fedorov On Wed, Apr 20, 2016 at 08:18:56 -0700, Richard Henderson wrote: > On 04/19/2016 04:07 PM, Emilio G. Cota wrote: > >From: Guillaume Delbergue > > > >Signed-off-by: Guillaume Delbergue > >[Rewritten. - Paolo] > >Signed-off-by: Paolo Bonzini > >[Emilio's additions: call cpu_relax() while spinning; optimize for > > uncontended locks by acquiring the lock with xchg+test instead of > > test+xchg+test.] > >Signed-off-by: Emilio G. Cota > >--- > > It probably doesn't matter for any real hosts, but do note that there are > compiler primitives for test-and-set that (can be) simpler for a cpu to > implement than xchg. This likely affects only ancient hosts like sparcv7, > or tiny hosts like SH. > > We don't have to change anything here, but it does seem more natural to use > a test-and-set primitive. I've tried to find a GCC intrinsic for test-and-set, and I've only found lock_test_and_set, which is what we use for atomic_xchg (except on ppc) because it really is an atomic exchange: "This builtin, as described by Intel, is not a traditional test-and-set operation, but rather an atomic exchange operation." https://gcc.gnu.org/onlinedocs/gcc-4.1.2/gcc/Atomic-Builtins.html > >+static inline int qemu_spin_trylock(QemuSpin *spin) > >+{ > >+ if (atomic_read(&spin->value) || atomic_xchg(&spin->value, true)) { > >+ return -EBUSY; > > I think there's no point in the extra read here. Yep that's a remnant of the original "TATAS" implementation. Will send a revised patch in a few minutes. Thanks, Emilio