From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34254) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1avhKA-0006u4-Ks for qemu-devel@nongnu.org; Thu, 28 Apr 2016 04:29:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1avhK6-0002QY-Kw for qemu-devel@nongnu.org; Thu, 28 Apr 2016 04:29:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36308) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1avhK6-0002QS-Fl for qemu-devel@nongnu.org; Thu, 28 Apr 2016 04:29:22 -0400 Date: Thu, 28 Apr 2016 16:29:15 +0800 From: Peter Xu Message-ID: <20160428082915.GF20143@pxdev.xzpeter.org> References: <1461827144-6937-1-git-send-email-peterx@redhat.com> <1461827144-6937-16-git-send-email-peterx@redhat.com> <5721BB09.2030302@web.de> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <5721BB09.2030302@web.de> Subject: Re: [Qemu-devel] [PATCH v5 15/18] intel_iommu: introduce IEC notifiers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: qemu-devel@nongnu.org, imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com, mst@redhat.com, pbonzini@redhat.com, rkrcmar@redhat.com, alex.williamson@redhat.com, wexu@redhat.com, David kiarie On Thu, Apr 28, 2016 at 09:26:01AM +0200, Jan Kiszka wrote: > On 2016-04-28 09:05, Peter Xu wrote: > > This patch introduces Intel VT-d IEC (Interrupt Entry Cache) > > invalidation notifier list. When vIOMMU receives IEC invalidate request, > > all the registered units will be notified with specific invalidation > > requests. > > This should be designed to be IOMMU-agnostic, i.e. become reusable for > the AMD implementation. I suspect we will have the same need for route > invalidations there as well... Yes possibly... I feel like there are lots of things that can be shared between Intel and AMD IOMMUs. I just do not know what is the most suitable "extent" that we should abstract these shared functionalities between the two, and how. For example, AFAIU, a better solution for current IOMMU codes (including Intel and AMD) is to provide a common framework (like... X86IOMMU?), abstract these shared things out into a framework, like per device name spaces, iotlb, IEC notifications, etc... However, that will need a lot of further work. Also, I still do not know whether this is a good idea even in the future. So, will this be a good point that we start to think about common code blocks for both Intel and AMD IOMMU? Thanks, -- peterx