From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57483) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1awrvT-0008De-QJ for qemu-devel@nongnu.org; Sun, 01 May 2016 10:00:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1awrvI-0002Qy-52 for qemu-devel@nongnu.org; Sun, 01 May 2016 10:00:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50771) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1awrvH-0002Pi-OD for qemu-devel@nongnu.org; Sun, 01 May 2016 10:00:35 -0400 Date: Sun, 1 May 2016 17:00:20 +0300 From: "Michael S. Tsirkin" Message-ID: <20160501165907-mutt-send-email-mst@redhat.com> References: <1461969763-5193-1-git-send-email-davidkiarie4@gmail.com> <20160501164540-mutt-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160501164540-mutt-send-email-mst@redhat.com> Subject: Re: [Qemu-devel] [V9 0/4] AMD IOMMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Kiarie Cc: qemu-devel@nongnu.org, jan.kiszka@web.de, valentine.sinitsyn@gmail.com, imammedo@redhat.com, marcel@redhat.com, peterx@redhat.com On Sun, May 01, 2016 at 04:47:44PM +0300, Michael S. Tsirkin wrote: > On Sat, Apr 30, 2016 at 01:42:39AM +0300, David Kiarie wrote: > > These series adds AMD IOMMU support to Qemu. It's currently in the 9th version. > > > > In this series I have (hopefully) addressed all the comments made in the previous version. > > changelog? > > > I have also tested and successfully passed-through PCI device 'ac97' with more devices to be tested. > > > A fundamental problem with AMD IOMMUs is that the VMM must write-protect > guest I/O page tables from the guest in order to intercept all guest > updates and propagate the updates to the shadow I/O page tables. > > AMD manual says as much. Actually while it says so, it's wrong. There's an NPcache flag which makes guest to invalidations for invalid to valid transitions. > Until this is implemented, I think device assignment must be disabled > when AMD IOMMU is in use. So I take this back. I would, however, like to see how this interacts with Aviv's patches enabling VFIO support for IOMMU. > > > > > David Kiarie (4): > > hw/i386: Introduce AMD IOMMU > > hw/i386: ACPI table for AMD IOMMU > > hw/core: Add AMD IOMMU to machine properties > > hw/pci-host: Emulate AMD IOMMU > > > > hw/acpi/aml-build.c | 2 +- > > hw/acpi/core.c | 13 - > > hw/core/machine.c | 33 +- > > hw/i386/Makefile.objs | 1 + > > hw/i386/acpi-build.c | 93 ++- > > hw/i386/amd_iommu.c | 1426 +++++++++++++++++++++++++++++++++++++++++ > > hw/i386/amd_iommu.h | 398 ++++++++++++ > > hw/pci-host/q35.c | 25 +- > > include/hw/acpi/acpi-defs.h | 14 + > > include/hw/acpi/acpi.h | 16 + > > include/hw/acpi/aml-build.h | 1 + > > include/hw/boards.h | 7 + > > include/hw/i386/intel_iommu.h | 1 + > > include/hw/pci/pci.h | 2 + > > qemu-options.hx | 7 +- > > util/qemu-config.c | 8 +- > > 16 files changed, 2012 insertions(+), 35 deletions(-) > > create mode 100644 hw/i386/amd_iommu.c > > create mode 100644 hw/i386/amd_iommu.h > > > > -- > > 2.1.4