[Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[xiaoqiang zhao]

This patch set QOM'ify files under hw/intc directory. See each commit 
message for details.

xiaoqiang zhao (9):
  hw/intc: QOM'ify etraxfs_pic.c
  hw/intc: QOM'ify exynos4210_combiner.c
  hw/intc: QOM'ify exynos4210_gic.c
  hw/intc: QOM'ify imx_avic.c
  hw/intc: QOM'ify lm32_pic.c
  hw/intc: QOM'ify pl190.c
  hw/intc: QOM'ify slavio_intctl.c
  hw/intc: QOM'ify grlib_irqmp.c
  hw/intc: QOM'ify omap_intc.c

 hw/intc/etraxfs_pic.c         | 13 +++++----
 hw/intc/exynos4210_combiner.c | 14 +++++-----
 hw/intc/exynos4210_gic.c      | 39 ++++++++++++++-------------
 hw/intc/grlib_irqmp.c         | 27 +++++++++++--------
 hw/intc/imx_avic.c            | 15 +++++------
 hw/intc/lm32_pic.c            | 12 ++++-----
 hw/intc/omap_intc.c           | 63 +++++++++++++++++++++++++------------------
 hw/intc/pl190.c               | 13 +++++----
 hw/intc/slavio_intctl.c       | 14 +++++-----
 9 files changed, 109 insertions(+), 101 deletions(-)

-- 
2.1.4

[Qemu-devel] [PATCH 1/9] hw/intc: QOM'ify etraxfs_pic.c

[xiaoqiang zhao]

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
 hw/intc/etraxfs_pic.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/hw/intc/etraxfs_pic.c b/hw/intc/etraxfs_pic.c
index 48f9477..64a6f4b 100644
--- a/hw/intc/etraxfs_pic.c
+++ b/hw/intc/etraxfs_pic.c
@@ -146,19 +146,19 @@ static void irq_handler(void *opaque, int irq, int level)
     pic_update(fs);
 }
 
-static int etraxfs_pic_init(SysBusDevice *sbd)
+static void etraxfs_pic_init(Object *obj)
 {
-    DeviceState *dev = DEVICE(sbd);
-    struct etrax_pic *s = ETRAX_FS_PIC(dev);
+    DeviceState *dev = DEVICE(obj);
+    struct etrax_pic *s = ETRAX_FS_PIC(obj);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 
     qdev_init_gpio_in(dev, irq_handler, 32);
     sysbus_init_irq(sbd, &s->parent_irq);
     sysbus_init_irq(sbd, &s->parent_nmi);
 
-    memory_region_init_io(&s->mmio, OBJECT(s), &pic_ops, s,
+    memory_region_init_io(&s->mmio, obj, &pic_ops, s,
                           "etraxfs-pic", R_MAX * 4);
     sysbus_init_mmio(sbd, &s->mmio);
-    return 0;
 }
 
 static Property etraxfs_pic_properties[] = {
@@ -169,9 +169,7 @@ static Property etraxfs_pic_properties[] = {
 static void etraxfs_pic_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
-    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 
-    k->init = etraxfs_pic_init;
     dc->props = etraxfs_pic_properties;
     /*
      * Note: pointer property "interrupt_vector" may remain null, thus
@@ -183,6 +181,7 @@ static const TypeInfo etraxfs_pic_info = {
     .name          = TYPE_ETRAX_FS_PIC,
     .parent        = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(struct etrax_pic),
+    .instance_init = etraxfs_pic_init,
     .class_init    = etraxfs_pic_class_init,
 };
 
-- 
2.1.4

[Qemu-devel] [PATCH 2/9] hw/intc: QOM'ify exynos4210_combiner.c

[xiaoqiang zhao]

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
 hw/intc/exynos4210_combiner.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c
index dc0c903..f19a706 100644
--- a/hw/intc/exynos4210_combiner.c
+++ b/hw/intc/exynos4210_combiner.c
@@ -406,10 +406,11 @@ static const MemoryRegionOps exynos4210_combiner_ops = {
 /*
  * Internal Combiner initialization.
  */
-static int exynos4210_combiner_init(SysBusDevice *sbd)
+static void exynos4210_combiner_init(Object *obj)
 {
-    DeviceState *dev = DEVICE(sbd);
-    Exynos4210CombinerState *s = EXYNOS4210_COMBINER(dev);
+    DeviceState *dev = DEVICE(obj);
+    Exynos4210CombinerState *s = EXYNOS4210_COMBINER(obj);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
     unsigned int i;
 
     /* Allocate general purpose input signals and connect a handler to each of
@@ -421,11 +422,9 @@ static int exynos4210_combiner_init(SysBusDevice *sbd)
         sysbus_init_irq(sbd, &s->output_irq[i]);
     }
 
-    memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_combiner_ops, s,
+    memory_region_init_io(&s->iomem, obj, &exynos4210_combiner_ops, s,
                           "exynos4210-combiner", IIC_REGION_SIZE);
     sysbus_init_mmio(sbd, &s->iomem);
-
-    return 0;
 }
 
 static Property exynos4210_combiner_properties[] = {
@@ -436,9 +435,7 @@ static Property exynos4210_combiner_properties[] = {
 static void exynos4210_combiner_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
-    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 
-    k->init = exynos4210_combiner_init;
     dc->reset = exynos4210_combiner_reset;
     dc->props = exynos4210_combiner_properties;
     dc->vmsd = &vmstate_exynos4210_combiner;
@@ -448,6 +445,7 @@ static const TypeInfo exynos4210_combiner_info = {
     .name          = TYPE_EXYNOS4210_COMBINER,
     .parent        = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(Exynos4210CombinerState),
+    .instance_init = exynos4210_combiner_init,
     .class_init    = exynos4210_combiner_class_init,
 };
 
-- 
2.1.4

[Qemu-devel] [PATCH 3/9] hw/intc: QOM'ify exynos4210_gic.c

[xiaoqiang zhao]

* Drop the old SysBus init function and use instance_init
* Split the exynos4210_irq_gate_init into an instance_init
  and a DeviceClass::realize function

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
 hw/intc/exynos4210_gic.c | 39 ++++++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 19 deletions(-)

diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c
index 4f7e89f..fd7a8f3 100644
--- a/hw/intc/exynos4210_gic.c
+++ b/hw/intc/exynos4210_gic.c
@@ -281,10 +281,11 @@ static void exynos4210_gic_set_irq(void *opaque, int irq, int level)
     qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level);
 }
 
-static int exynos4210_gic_init(SysBusDevice *sbd)
+static void exynos4210_gic_init(Object *obj)
 {
-    DeviceState *dev = DEVICE(sbd);
-    Exynos4210GicState *s = EXYNOS4210_GIC(dev);
+    DeviceState *dev = DEVICE(obj);
+    Exynos4210GicState *s = EXYNOS4210_GIC(obj);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
     uint32_t i;
     const char cpu_prefix[] = "exynos4210-gic-alias_cpu";
     const char dist_prefix[] = "exynos4210-gic-alias_dist";
@@ -305,15 +306,15 @@ static int exynos4210_gic_init(SysBusDevice *sbd)
     qdev_init_gpio_in(dev, exynos4210_gic_set_irq,
                       EXYNOS4210_GIC_NIRQ - 32);
 
-    memory_region_init(&s->cpu_container, OBJECT(s), "exynos4210-cpu-container",
+    memory_region_init(&s->cpu_container, obj, "exynos4210-cpu-container",
             EXYNOS4210_EXT_GIC_CPU_REGION_SIZE);
-    memory_region_init(&s->dist_container, OBJECT(s), "exynos4210-dist-container",
+    memory_region_init(&s->dist_container, obj, "exynos4210-dist-container",
             EXYNOS4210_EXT_GIC_DIST_REGION_SIZE);
 
     for (i = 0; i < s->num_cpu; i++) {
         /* Map CPU interface per SMP Core */
         sprintf(cpu_alias_name, "%s%x", cpu_prefix, i);
-        memory_region_init_alias(&s->cpu_alias[i], OBJECT(s),
+        memory_region_init_alias(&s->cpu_alias[i], obj,
                                  cpu_alias_name,
                                  sysbus_mmio_get_region(busdev, 1),
                                  0,
@@ -323,7 +324,7 @@ static int exynos4210_gic_init(SysBusDevice *sbd)
 
         /* Map Distributor per SMP Core */
         sprintf(dist_alias_name, "%s%x", dist_prefix, i);
-        memory_region_init_alias(&s->dist_alias[i], OBJECT(s),
+        memory_region_init_alias(&s->dist_alias[i], obj,
                                  dist_alias_name,
                                  sysbus_mmio_get_region(busdev, 0),
                                  0,
@@ -334,8 +335,6 @@ static int exynos4210_gic_init(SysBusDevice *sbd)
 
     sysbus_init_mmio(sbd, &s->cpu_container);
     sysbus_init_mmio(sbd, &s->dist_container);
-
-    return 0;
 }
 
 static Property exynos4210_gic_properties[] = {
@@ -346,9 +345,7 @@ static Property exynos4210_gic_properties[] = {
 static void exynos4210_gic_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
-    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 
-    k->init = exynos4210_gic_init;
     dc->props = exynos4210_gic_properties;
 }
 
@@ -356,6 +353,7 @@ static const TypeInfo exynos4210_gic_info = {
     .name          = TYPE_EXYNOS4210_GIC,
     .parent        = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(Exynos4210GicState),
+    .instance_init = exynos4210_gic_init,
     .class_init    = exynos4210_gic_class_init,
 };
 
@@ -430,9 +428,16 @@ static void exynos4210_irq_gate_reset(DeviceState *d)
 /*
  * IRQ Gate initialization.
  */
-static int exynos4210_irq_gate_init(SysBusDevice *sbd)
+static void exynos4210_irq_gate_init(Object *obj)
+{
+    Exynos4210IRQGateState *s = EXYNOS4210_IRQ_GATE(obj);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+    sysbus_init_irq(sbd, &s->out);
+}
+
+static void exynos4210_irq_gate_realize(DeviceState *dev, Error **errp)
 {
-    DeviceState *dev = DEVICE(sbd);
     Exynos4210IRQGateState *s = EXYNOS4210_IRQ_GATE(dev);
 
     /* Allocate general purpose input signals and connect a handler to each of
@@ -440,27 +445,23 @@ static int exynos4210_irq_gate_init(SysBusDevice *sbd)
     qdev_init_gpio_in(dev, exynos4210_irq_gate_handler, s->n_in);
 
     s->level = g_malloc0(s->n_in * sizeof(*s->level));
-
-    sysbus_init_irq(sbd, &s->out);
-
-    return 0;
 }
 
 static void exynos4210_irq_gate_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
-    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 
-    k->init = exynos4210_irq_gate_init;
     dc->reset = exynos4210_irq_gate_reset;
     dc->vmsd = &vmstate_exynos4210_irq_gate;
     dc->props = exynos4210_irq_gate_properties;
+    dc->realize = exynos4210_irq_gate_realize;
 }
 
 static const TypeInfo exynos4210_irq_gate_info = {
     .name          = TYPE_EXYNOS4210_IRQ_GATE,
     .parent        = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(Exynos4210IRQGateState),
+    .instance_init = exynos4210_irq_gate_init,
     .class_init    = exynos4210_irq_gate_class_init,
 };
 
-- 
2.1.4

[Qemu-devel] [PATCH 4/9] hw/intc: QOM'ify imx_avic.c

[xiaoqiang zhao]

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
 hw/intc/imx_avic.c | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/hw/intc/imx_avic.c b/hw/intc/imx_avic.c
index 7027655..d21cb97 100644
--- a/hw/intc/imx_avic.c
+++ b/hw/intc/imx_avic.c
@@ -321,28 +321,26 @@ static void imx_avic_reset(DeviceState *dev)
     memset(s->prio, 0, sizeof s->prio);
 }
 
-static int imx_avic_init(SysBusDevice *sbd)
+static void imx_avic_init(Object *obj)
 {
-    DeviceState *dev = DEVICE(sbd);
-    IMXAVICState *s = IMX_AVIC(dev);
+    DeviceState *dev = DEVICE(obj);
+    IMXAVICState *s = IMX_AVIC(obj);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 
-    memory_region_init_io(&s->iomem, OBJECT(s), &imx_avic_ops, s,
+    memory_region_init_io(&s->iomem, obj, &imx_avic_ops, s,
                           TYPE_IMX_AVIC, 0x1000);
     sysbus_init_mmio(sbd, &s->iomem);
 
     qdev_init_gpio_in(dev, imx_avic_set_irq, IMX_AVIC_NUM_IRQS);
     sysbus_init_irq(sbd, &s->irq);
     sysbus_init_irq(sbd, &s->fiq);
-
-    return 0;
 }
 
 
 static void imx_avic_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
-    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
-    k->init = imx_avic_init;
+
     dc->vmsd = &vmstate_imx_avic;
     dc->reset = imx_avic_reset;
     dc->desc = "i.MX Advanced Vector Interrupt Controller";
@@ -352,6 +350,7 @@ static const TypeInfo imx_avic_info = {
     .name = TYPE_IMX_AVIC,
     .parent = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(IMXAVICState),
+    .instance_init = imx_avic_init,
     .class_init = imx_avic_class_init,
 };
 
-- 
2.1.4

[Qemu-devel] [PATCH 5/9] hw/intc: QOM'ify lm32_pic.c

[xiaoqiang zhao]

Drop the old SysBus init function and use instance_init

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
 hw/intc/lm32_pic.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/hw/intc/lm32_pic.c b/hw/intc/lm32_pic.c
index edc08f1..3dad01c 100644
--- a/hw/intc/lm32_pic.c
+++ b/hw/intc/lm32_pic.c
@@ -152,17 +152,16 @@ static void pic_reset(DeviceState *d)
     }
 }
 
-static int lm32_pic_init(SysBusDevice *sbd)
+static void lm32_pic_init(Object *obj)
 {
-    DeviceState *dev = DEVICE(sbd);
-    LM32PicState *s = LM32_PIC(dev);
+    DeviceState *dev = DEVICE(obj);
+    LM32PicState *s = LM32_PIC(obj);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 
     qdev_init_gpio_in(dev, irq_handler, 32);
     sysbus_init_irq(sbd, &s->parent_irq);
 
     pic = s;
-
-    return 0;
 }
 
 static const VMStateDescription vmstate_lm32_pic = {
@@ -181,9 +180,7 @@ static const VMStateDescription vmstate_lm32_pic = {
 static void lm32_pic_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
-    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 
-    k->init = lm32_pic_init;
     dc->reset = pic_reset;
     dc->vmsd = &vmstate_lm32_pic;
 }
@@ -192,6 +189,7 @@ static const TypeInfo lm32_pic_info = {
     .name          = TYPE_LM32_PIC,
     .parent        = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(LM32PicState),
+    .instance_init = lm32_pic_init,
     .class_init    = lm32_pic_class_init,
 };
 
-- 
2.1.4

Re: [Qemu-devel] [PATCH 5/9] hw/intc: QOM'ify lm32_pic.c

[michael]

Am 2016-03-30 12:09, schrieb xiaoqiang zhao:
> Drop the old SysBus init function and use instance_init
> 
> Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>

Acked-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>

-michael

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[Peter Maydell]

On 30 March 2016 at 11:09, xiaoqiang zhao <zxq_yx_007@163.com> wrote:
> This patch set QOM'ify files under hw/intc directory. See each commit
> message for details.
>
> xiaoqiang zhao (9):
>   hw/intc: QOM'ify etraxfs_pic.c
>   hw/intc: QOM'ify exynos4210_combiner.c
>   hw/intc: QOM'ify exynos4210_gic.c
>   hw/intc: QOM'ify imx_avic.c
>   hw/intc: QOM'ify lm32_pic.c
>   hw/intc: QOM'ify pl190.c
>   hw/intc: QOM'ify slavio_intctl.c
>   hw/intc: QOM'ify grlib_irqmp.c
>   hw/intc: QOM'ify omap_intc.c
>
>  hw/intc/etraxfs_pic.c         | 13 +++++----
>  hw/intc/exynos4210_combiner.c | 14 +++++-----
>  hw/intc/exynos4210_gic.c      | 39 ++++++++++++++-------------
>  hw/intc/grlib_irqmp.c         | 27 +++++++++++--------
>  hw/intc/imx_avic.c            | 15 +++++------
>  hw/intc/lm32_pic.c            | 12 ++++-----
>  hw/intc/omap_intc.c           | 63 +++++++++++++++++++++++++------------------
>  hw/intc/pl190.c               | 13 +++++----
>  hw/intc/slavio_intctl.c       | 14 +++++-----
>  9 files changed, 109 insertions(+), 101 deletions(-)

Hi. I had a comment on patch 9 (omap_intc), but 1-8 look good.
Only patches 2, 3, 4 and 6 are ARM-related.

SPARC, lm32, CRIS maintainers: do you want to take your patches
or shall I just take 1-8 through the target-arm.next tree?

Xaioqiang: if you're planning to do more of these QOMify
series in future it might be easier on maintainers if you
split them up by target architecture rather than by
type-of-device. Otherwise we have lots of these series which
touch devices for four different architectures and should
really go through four different maintainers.

I forget if I've said this before, but I do really appreciate
these patches -- cleanup of older devices to bring them up
to modern QEMU standards is a thankless task but it's an
important one.

thanks
-- PMM

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[Edgar E. Iglesias]

On Wed, May 04, 2016 at 03:56:25PM +0100, Peter Maydell wrote:
> On 30 March 2016 at 11:09, xiaoqiang zhao <zxq_yx_007@163.com> wrote:
> > This patch set QOM'ify files under hw/intc directory. See each commit
> > message for details.
> >
> > xiaoqiang zhao (9):
> >   hw/intc: QOM'ify etraxfs_pic.c
> >   hw/intc: QOM'ify exynos4210_combiner.c
> >   hw/intc: QOM'ify exynos4210_gic.c
> >   hw/intc: QOM'ify imx_avic.c
> >   hw/intc: QOM'ify lm32_pic.c
> >   hw/intc: QOM'ify pl190.c
> >   hw/intc: QOM'ify slavio_intctl.c
> >   hw/intc: QOM'ify grlib_irqmp.c
> >   hw/intc: QOM'ify omap_intc.c
> >
> >  hw/intc/etraxfs_pic.c         | 13 +++++----
> >  hw/intc/exynos4210_combiner.c | 14 +++++-----
> >  hw/intc/exynos4210_gic.c      | 39 ++++++++++++++-------------
> >  hw/intc/grlib_irqmp.c         | 27 +++++++++++--------
> >  hw/intc/imx_avic.c            | 15 +++++------
> >  hw/intc/lm32_pic.c            | 12 ++++-----
> >  hw/intc/omap_intc.c           | 63 +++++++++++++++++++++++++------------------
> >  hw/intc/pl190.c               | 13 +++++----
> >  hw/intc/slavio_intctl.c       | 14 +++++-----
> >  9 files changed, 109 insertions(+), 101 deletions(-)
> 
> Hi. I had a comment on patch 9 (omap_intc), but 1-8 look good.
> Only patches 2, 3, 4 and 6 are ARM-related.
> 
> SPARC, lm32, CRIS maintainers: do you want to take your patches
> or shall I just take 1-8 through the target-arm.next tree?

Feel free to take the CRIS stuff.

Thanks,
Edgar


> 
> Xaioqiang: if you're planning to do more of these QOMify
> series in future it might be easier on maintainers if you
> split them up by target architecture rather than by
> type-of-device. Otherwise we have lots of these series which
> touch devices for four different architectures and should
> really go through four different maintainers.
> 
> I forget if I've said this before, but I do really appreciate
> these patches -- cleanup of older devices to bring them up
> to modern QEMU standards is a thankless task but it's an
> important one.
> 
> thanks
> -- PMM

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[Peter Maydell]

Oops, just noticed the SPARC maintainers weren't cc'd on this.

-- PMM

On 4 May 2016 at 15:56, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 30 March 2016 at 11:09, xiaoqiang zhao <zxq_yx_007@163.com> wrote:
>> This patch set QOM'ify files under hw/intc directory. See each commit
>> message for details.
>>
>> xiaoqiang zhao (9):
>>   hw/intc: QOM'ify etraxfs_pic.c
>>   hw/intc: QOM'ify exynos4210_combiner.c
>>   hw/intc: QOM'ify exynos4210_gic.c
>>   hw/intc: QOM'ify imx_avic.c
>>   hw/intc: QOM'ify lm32_pic.c
>>   hw/intc: QOM'ify pl190.c
>>   hw/intc: QOM'ify slavio_intctl.c
>>   hw/intc: QOM'ify grlib_irqmp.c
>>   hw/intc: QOM'ify omap_intc.c
>>
>>  hw/intc/etraxfs_pic.c         | 13 +++++----
>>  hw/intc/exynos4210_combiner.c | 14 +++++-----
>>  hw/intc/exynos4210_gic.c      | 39 ++++++++++++++-------------
>>  hw/intc/grlib_irqmp.c         | 27 +++++++++++--------
>>  hw/intc/imx_avic.c            | 15 +++++------
>>  hw/intc/lm32_pic.c            | 12 ++++-----
>>  hw/intc/omap_intc.c           | 63 +++++++++++++++++++++++++------------------
>>  hw/intc/pl190.c               | 13 +++++----
>>  hw/intc/slavio_intctl.c       | 14 +++++-----
>>  9 files changed, 109 insertions(+), 101 deletions(-)
>
> Hi. I had a comment on patch 9 (omap_intc), but 1-8 look good.
> Only patches 2, 3, 4 and 6 are ARM-related.
>
> SPARC, lm32, CRIS maintainers: do you want to take your patches
> or shall I just take 1-8 through the target-arm.next tree?
>
> Xaioqiang: if you're planning to do more of these QOMify
> series in future it might be easier on maintainers if you
> split them up by target architecture rather than by
> type-of-device. Otherwise we have lots of these series which
> touch devices for four different architectures and should
> really go through four different maintainers.
>
> I forget if I've said this before, but I do really appreciate
> these patches -- cleanup of older devices to bring them up
> to modern QEMU standards is a thankless task but it's an
> important one.
>
> thanks
> -- PMM

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[michael]

Hi Peter,

Am 2016-05-04 16:56, schrieb Peter Maydell:

> SPARC, lm32, CRIS maintainers: do you want to take your patches
> or shall I just take 1-8 through the target-arm.next tree?

There are other ones (milkymist-ac97, lm32_uart, lm32_juart, 
milkymist-vgafb, milkymist-tmu2, lm32_timer, milkymist-sysctl). So 
unless you'll take these too, I'll pick them.

-michael

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[Peter Maydell]

On 9 May 2016 at 10:24,  <michael@walle.cc> wrote:
> Hi Peter,
>
> Am 2016-05-04 16:56, schrieb Peter Maydell:
>
>> SPARC, lm32, CRIS maintainers: do you want to take your patches
>> or shall I just take 1-8 through the target-arm.next tree?
>
>
> There are other ones (milkymist-ac97, lm32_uart, lm32_juart,
> milkymist-vgafb, milkymist-tmu2, lm32_timer, milkymist-sysctl). So unless
> you'll take these too, I'll pick them.

OK, happy to let you take those, I've dropped them from
the target-arm queue.

-- PMM

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[Peter Maydell]

On 9 May 2016 at 10:33, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 9 May 2016 at 10:24,  <michael@walle.cc> wrote:
>> Hi Peter,
>>
>> Am 2016-05-04 16:56, schrieb Peter Maydell:
>>
>>> SPARC, lm32, CRIS maintainers: do you want to take your patches
>>> or shall I just take 1-8 through the target-arm.next tree?
>>
>>
>> There are other ones (milkymist-ac97, lm32_uart, lm32_juart,
>> milkymist-vgafb, milkymist-tmu2, lm32_timer, milkymist-sysctl). So unless
>> you'll take these too, I'll pick them.
>
> OK, happy to let you take those, I've dropped them from
> the target-arm queue.

...specifically, dorpped "hw/intc: QOM'ify lm32_pic.c". I'm
still carrying the SPARC and CRIS patches.

thanks
-- PMM

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[赵小强]

At 2016-05-09 17:24:04, michael@walle.cc wrote:
>Hi Peter,
>
>Am 2016-05-04 16:56, schrieb Peter Maydell:
>
>> SPARC, lm32, CRIS maintainers: do you want to take your patches
>> or shall I just take 1-8 through the target-arm.next tree?
>
>There are other ones (milkymist-ac97, lm32_uart, lm32_juart, 
>milkymist-vgafb, milkymist-tmu2, lm32_timer, milkymist-sysctl). So 
>unless you'll take these too, I'll pick them.
>
>-michael

>

michael :

  Have you pick up the patch lm32_timer, milkymist-sysctl ? 

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[Michael Walle]

hi, 

im planning to, please bear with me, as i'm on vacation. 

-michael

Am 2. Juni 2016 16:10:40 GMT+06:00, schrieb "赵小强" <zxq_yx_007@163.com>:
>
>
>At 2016-05-09 17:24:04, michael@walle.cc wrote:
>>Hi Peter,
>>
>>Am 2016-05-04 16:56, schrieb Peter Maydell:
>>
>>> SPARC, lm32, CRIS maintainers: do you want to take your patches
>>> or shall I just take 1-8 through the target-arm.next tree?
>>
>>There are other ones (milkymist-ac97, lm32_uart, lm32_juart, 
>>milkymist-vgafb, milkymist-tmu2, lm32_timer, milkymist-sysctl). So 
>>unless you'll take these too, I'll pick them.
>>
>>-michael
>
>>
>
>michael :
>
>  Have you pick up the patch lm32_timer, milkymist-sysctl ? 

-- 
Diese Nachricht wurde von meinem Android-Mobiltelefon mit K-9 Mail gesendet.

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

[xiaoqiang zhao]

> 在 2016年6月2日，19:01，Michael Walle <michael@walle.cc> 写道：
> 
> hi, 
> 
> im planning to, please bear with me, as i'm on vacation. 
> 
> -michael

Oh，have a good time ;-)