From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54839) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ay0Uh-00032l-E9 for qemu-devel@nongnu.org; Wed, 04 May 2016 13:21:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ay0UV-0002M7-M6 for qemu-devel@nongnu.org; Wed, 04 May 2016 13:21:45 -0400 Date: Wed, 4 May 2016 19:21:04 +0200 From: "Edgar E. Iglesias" Message-ID: <20160504172104.GZ16305@toto> References: <1461931684-1867-1-git-send-email-edgar.iglesias@gmail.com> <1461931684-1867-4-git-send-email-edgar.iglesias@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH v3 3/7] target-arm: Add the IL flag to syn_data_abort List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: QEMU Developers , Alex =?iso-8859-1?Q?Benn=E9e?= , Sergey Fedorov , Richard Henderson , qemu-arm , Edgar Iglesias On Wed, May 04, 2016 at 06:06:34PM +0100, Peter Maydell wrote: > On 29 April 2016 at 13:08, Edgar E. Iglesias wrote: > > From: "Edgar E. Iglesias" > > > > Add the IL flag to syn_data_abort(). Since we at the moment > > never set ISV, the IL flag is always set to one. > > > > Signed-off-by: Edgar E. Iglesias > > --- > > target-arm/internals.h | 4 +++- > > target-arm/op_helper.c | 6 ++++-- > > 2 files changed, 7 insertions(+), 3 deletions(-) > > > > diff --git a/target-arm/internals.h b/target-arm/internals.h > > index 2e70272..34e2688 100644 > > --- a/target-arm/internals.h > > +++ b/target-arm/internals.h > > @@ -384,9 +384,11 @@ static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc) > > } > > > > static inline uint32_t syn_data_abort(int same_el, int ea, int cm, int s1ptw, > > - int wnr, int fsc) > > + int wnr, int fsc, > > + bool is_16bit) > > { > > return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) > > + | (is_16bit ? 0 : ARM_EL_IL) > > | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc; > > } > > > > diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c > > index d626ff1..e69c1de 100644 > > --- a/target-arm/op_helper.c > > +++ b/target-arm/op_helper.c > > @@ -115,7 +115,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, > > syn = syn_insn_abort(same_el, 0, fi.s1ptw, syn); > > exc = EXCP_PREFETCH_ABORT; > > } else { > > - syn = syn_data_abort(same_el, 0, 0, fi.s1ptw, is_write == 1, syn); > > + syn = syn_data_abort(same_el, 0, 0, fi.s1ptw, is_write == 1, syn, > > + 1); > > if (is_write == 1 && arm_feature(env, ARM_FEATURE_V6)) { > > fsr |= (1 << 11); > > } > > @@ -161,7 +162,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write, > > } > > > > raise_exception(env, EXCP_DATA_ABORT, > > - syn_data_abort(same_el, 0, 0, 0, is_write == 1, 0x21), > > + syn_data_abort(same_el, 0, 0, 0, is_write == 1, 0x21, > > + 1), > > target_el); > > } > > Shouldn't this patch be squashed into patch 4? Pretty much everything it > does is undone by the next patch... Yes, sounds good, we can do that. Thanks, Edgar