From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37563) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1azrvv-0000X4-Fq for qemu-devel@nongnu.org; Mon, 09 May 2016 16:37:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1azrvp-0007GU-CF for qemu-devel@nongnu.org; Mon, 09 May 2016 16:37:37 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38966) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1azrvp-0007EL-36 for qemu-devel@nongnu.org; Mon, 09 May 2016 16:37:33 -0400 Date: Mon, 9 May 2016 22:37:24 +0200 From: Radim =?utf-8?B?S3LEjW3DocWZ?= Message-ID: <20160509203724.GA806@potion> References: <1462418761-12714-1-git-send-email-peterx@redhat.com> <20160509171525.GA9224@potion> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20160509171525.GA9224@potion> Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v6 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Xu Cc: ehabkost@redhat.com, mst@redhat.com, jasowang@redhat.com, qemu-devel@nongnu.org, alex.williamson@redhat.com, jan.kiszka@web.de, wexu@redhat.com, imammedo@redhat.com, marcel@redhat.com, pbonzini@redhat.com, davidkiarie4@gmail.com, rth@twiddle.net 2016-05-09 19:15+0200, Radim Kr=C4=8Dm=C3=A1=C5=99: > From: =3D?UTF-8?q?Radim=3D20Kr=3DC4=3D8Dm=3DC3=3DA1=3DC5=3D99?=3D > Date: Mon, 9 May 2016 19:04:56 +0200 > Subject: [PATCH] intel_iommu: support all masks in interrupt entry cach= e > invalidation >=20 > Linux guests do not gracefully handle cases when the invalidation mask > they wanted is not supported, probably because real hardware always > allowed all. >=20 > We can just say that all 16 masks are supported, because both > ioapic_iec_notifier and kvm_update_msi_routes_all invalidate all caches= . >=20 > Signed-off-by: Radim Kr=C4=8Dm=C3=A1=C5=99 > --- > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > @@ -2359,7 +2359,7 @@ static void vtd_init(IntelIOMMUState *s) > s->ecap =3D VTD_ECAP_QI | VTD_ECAP_IRO; > =20 > if (ms->iommu_intr) { > - s->ecap |=3D VTD_ECAP_IR | VTD_ECAP_EIM; > + s->ecap |=3D VTD_ECAP_IR | VTD_ECAP_EIM | VTD_ECAP_MHVM; Eh, I really cannot spell ... this one should read VTD_ECAP_MHMV. (... or compile after a last-second renaming.) > diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_inter= nal.h > @@ -186,6 +186,7 @@ > +#define VTD_ECAP_MHMV (15ULL << 20)