From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b333l-0007by-16 for qemu-devel@nongnu.org; Wed, 18 May 2016 11:06:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b333g-0004LJ-NC for qemu-devel@nongnu.org; Wed, 18 May 2016 11:06:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37783) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b333g-0004LD-EU for qemu-devel@nongnu.org; Wed, 18 May 2016 11:06:48 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E9C5F78226 for ; Wed, 18 May 2016 15:06:47 +0000 (UTC) Date: Wed, 18 May 2016 18:06:45 +0300 From: "Michael S. Tsirkin" Message-ID: <20160518180456-mutt-send-email-mst@redhat.com> References: <1463340214-8721-1-git-send-email-marcel@redhat.com> <1463340214-8721-3-git-send-email-marcel@redhat.com> <20160518155929.01d7b07f@nial.brq.redhat.com> <20160518170958-mutt-send-email-mst@redhat.com> <573C7839.3090802@redhat.com> <20160518163146.7554ac6f@nial.brq.redhat.com> <20160518173737-mutt-send-email-mst@redhat.com> <573C81AD.7080603@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <573C81AD.7080603@redhat.com> Subject: Re: [Qemu-devel] [PATCH V2 2/4] pci: reserve 64 bit MMIO range for PCI hotplug List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Marcel Apfelbaum Cc: Igor Mammedov , qemu-devel@nongnu.org, lersek@redhat.com, ehabkost@redhat.com On Wed, May 18, 2016 at 05:52:29PM +0300, Marcel Apfelbaum wrote: > On 05/18/2016 05:42 PM, Michael S. Tsirkin wrote: > >On Wed, May 18, 2016 at 04:31:46PM +0200, Igor Mammedov wrote: > >>On Wed, 18 May 2016 17:12:09 +0300 > >>Marcel Apfelbaum wrote: > >> > >>>On 05/18/2016 05:11 PM, Michael S. Tsirkin wrote: > >>>>On Wed, May 18, 2016 at 03:59:29PM +0200, Igor Mammedov wrote: > >>>>>On Sun, 15 May 2016 22:23:32 +0300 > >>>>>Marcel Apfelbaum wrote: > >>>>> > >>>>>>Using the firmware assigned MMIO ranges for 64-bit PCI window > >>>>>>leads to zero space for hot-plugging PCI devices over 4G. > >>>>>> > >>>>>>PC machines can use the whole CPU addressable range after > >>>>>>the space reserved for memory-hotplug. > >>>>>> > >>>>>>Signed-off-by: Marcel Apfelbaum > >>>>>that patch also has side effect of unconditionally adding > >>>>>QWordMemory() resource in PCI0._CRS > >>>>>on all machine types with QEMU generated ACPI tables. > >>>>> > >>>>>Have you tested that it won't break boot of legacy OSes > >>>>>(XP, WS2003, old linux with 32bit kernel)? > >>>> > >>>>It's almost sure it break it. > >>>>Maybe you can check _REV in _CRS to work around this for XP. > >>> > >>>I'll try it. > >>but only after you check if just presence of QWord would crash XP, > >>so in case it doesn't crash we would keep _CRS simple static > >>structure. > >> > >>I very vaguely recall that XP ignored QWord in PCI0._CRS, > >>but it was long time ago so it won't hurt to recheck. > > > >I played with different guests (32 and 64 bit) > >at some point. > > > >Generally, windows tends to crash when CRS resources exceed the > >supported limits > >of physical memory (sometimes with weird off by one errors, > >e.g. win7 32 bit seems to survive with a 36 bit pci hole even though > >this means the max address is 2^37-1 which it can't address). > > > >This might depend on CPU as well. > > It seems QEMU returns 40-bit as CPU addressable bits, but I might got it wrong. > > > > >Which makes me ask: why don't we fix this in BIOS? > >If you want it to allocate a large window, do it. > > I don't follow, BIOS can assign resources to PCI devices, but how to > specify a MMIO range for hot-plug? Add it to the CRS of the host-bridge, right? > > Thanks, > Marcel > > [...] Ah I forgot on PC there's no register for this. On Q35 there is. -- MST