From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44591) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7oak-0003PH-RZ for qemu-devel@nongnu.org; Tue, 31 May 2016 14:40:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b7oai-0001aM-RY for qemu-devel@nongnu.org; Tue, 31 May 2016 14:40:37 -0400 From: Pranith Kumar Date: Tue, 31 May 2016 14:39:19 -0400 Message-Id: <20160531183928.29406-5-bobby.prani@gmail.com> In-Reply-To: <20160531183928.29406-1-bobby.prani@gmail.com> References: <20160531183928.29406-1-bobby.prani@gmail.com> Subject: [Qemu-devel] [RFC v2 PATCH 04/13] tcg/arm: Add support for fence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andrzej Zaborowski , Richard Henderson , "open list:ARM target" , "open list:All patches CC here" Cc: alex.bennee@linaro.org, serge.fdrv@linaro.org, Peter Maydell Cc: Andrzej Zaborowski Cc: Peter Maydell Signed-off-by: Pranith Kumar Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.inc.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index a914762..e88d8ce 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -305,6 +305,10 @@ typedef enum { INSN_LDRD_REG = 0x000000d0, INSN_STRD_IMM = 0x004000f0, INSN_STRD_REG = 0x000000f0, + + INSN_DMB_ISH = 0x5bf07ff5, + INSN_DMB_MCR = 0xba0f07ee, + } ARMInsn; #define SHIFT_IMM_LSL(im) (((im) << 7) | 0x00) @@ -1905,6 +1909,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_udiv(s, COND_AL, args[0], args[1], args[2]); break; + case INDEX_op_mb: + if (use_armv7_instructions) { + tcg_out32(s, INSN_DMB_ISH); + } else if (use_armv6_instructions) { + tcg_out32(s, INSN_DMB_MCR); + } + break; case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ case INDEX_op_call: /* Always emitted via tcg_out_call. */ @@ -1979,6 +1990,7 @@ static const TCGTargetOpDef arm_op_defs[] = { { INDEX_op_div_i32, { "r", "r", "r" } }, { INDEX_op_divu_i32, { "r", "r", "r" } }, + { INDEX_op_mb, { "r" } }, { -1 }, }; -- 2.8.3