From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44598) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7oal-0003PW-8W for qemu-devel@nongnu.org; Tue, 31 May 2016 14:40:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b7oaj-0001aT-0Z for qemu-devel@nongnu.org; Tue, 31 May 2016 14:40:38 -0400 Received: from mail-yw0-x243.google.com ([2607:f8b0:4002:c05::243]:33684) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7oai-0001aJ-R6 for qemu-devel@nongnu.org; Tue, 31 May 2016 14:40:36 -0400 Received: by mail-yw0-x243.google.com with SMTP id y6so20074093ywe.0 for ; Tue, 31 May 2016 11:40:36 -0700 (PDT) From: Pranith Kumar Date: Tue, 31 May 2016 14:39:23 -0400 Message-Id: <20160531183928.29406-9-bobby.prani@gmail.com> In-Reply-To: <20160531183928.29406-1-bobby.prani@gmail.com> References: <20160531183928.29406-1-bobby.prani@gmail.com> Subject: [Qemu-devel] [RFC v2 PATCH 08/13] tcg/s390: Add support for fence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf , Richard Henderson , "open list:All patches CC here" Cc: alex.bennee@linaro.org, serge.fdrv@linaro.org Cc: Alexander Graf Signed-off-by: Richard Henderson Signed-off-by: Pranith Kumar --- tcg/s390/tcg-target.inc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index e95b04b..b4f14bc 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -341,6 +341,7 @@ static tcg_insn_unit *tb_ret_addr; #define FACILITY_EXT_IMM (1ULL << (63 - 21)) #define FACILITY_GEN_INST_EXT (1ULL << (63 - 34)) #define FACILITY_LOAD_ON_COND (1ULL << (63 - 45)) +#define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND static uint64_t facilities; @@ -2157,6 +2158,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tgen_deposit(s, args[0], args[2], args[3], args[4]); break; + case INDEX_op_mb: + /* The host memory model is quite strong, we simply need to + serialize the instruction stream. */ + tcg_out_insn(s, RR, BCR, + facilities & FACILITY_FAST_BCR_SER ? 14 : 15, 0); + break; + case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_mov_i64: case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ @@ -2278,6 +2286,7 @@ static const TCGTargetOpDef s390_op_defs[] = { { INDEX_op_movcond_i64, { "r", "r", "rC", "r", "0" } }, { INDEX_op_deposit_i64, { "r", "0", "r" } }, + { INDEX_op_mb, { "r" } }, { -1 }, }; -- 2.8.3