From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47038) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b8JRu-0007or-Qz for qemu-devel@nongnu.org; Wed, 01 Jun 2016 23:37:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b8JRn-0008Dv-U0 for qemu-devel@nongnu.org; Wed, 01 Jun 2016 23:37:33 -0400 Date: Thu, 2 Jun 2016 13:36:48 +1000 From: David Gibson Message-ID: <20160602033648.GL15455@voom.fritz.box> References: <201606010902.u51901oX007518@mx0a-001b2d01.pphosted.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="1X+6QtwRodzgDPAC" Content-Disposition: inline In-Reply-To: <201606010902.u51901oX007518@mx0a-001b2d01.pphosted.com> Subject: Re: [Qemu-devel] [PATCH qemu v17 00/12] spapr: vfio: Enable Dynamic DMA windows (DDW) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexey Kardashevskiy Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Alexander Graf , Alex Williamson --1X+6QtwRodzgDPAC Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jun 01, 2016 at 06:57:31PM +1000, Alexey Kardashevskiy wrote: > Each Partitionable Endpoint (IOMMU group) has an address range on a PCI b= us > where devices are allowed to do DMA. These ranges are called DMA windows. > By default, there is a single DMA window, 1 or 2GB big, mapped at zero > on a PCI bus. >=20 > PAPR defines a DDW RTAS API which allows pseries guests > querying the hypervisor about DDW support and capabilities (page size mask > for now). A pseries guest may request an additional (to the default) > DMA windows using this RTAS API. > The existing pseries Linux guests request an additional window as big as > the guest RAM and map the entire guest window which effectively creates > direct mapping of the guest memory to a PCI bus. >=20 > This patchset reworks PPC64 IOMMU code and adds necessary structures > to support big windows on pseries. >=20 > This patchset is based on David's ppc-for-2.7-20160531 tag. >=20 >=20 > Please comment. Thanks! I've merged 1-5. 6 needs some sort of ack from Paolo. Continuing to review the remainder. >=20 >=20 > Alexey Kardashevskiy (12): > vmstate: Define VARRAY with VMS_ALLOC > spapr_iommu: Introduce "enabled" state for TCE table > spapr_iommu: Migrate full state > spapr_iommu: Add root memory region > spapr_pci: Reset DMA config on PHB reset > memory: Add reporting of supported page sizes > vfio: spapr: Add DMA memory preregistering (SPAPR IOMMU v2) > spapr_pci: Add and export DMA resetting helper > vfio: Add host side DMA window capabilities > vfio/spapr: Create DMA window dynamically (SPAPR IOMMU v2) > spapr_pci/spapr_pci_vfio: Support Dynamic DMA Windows (DDW) > spapr_iommu, vfio, memory: Notify IOMMU about starting/stopping > listening >=20 > hw/ppc/Makefile.objs | 1 + > hw/ppc/spapr.c | 5 + > hw/ppc/spapr_iommu.c | 160 +++++++++++++++++++---- > hw/ppc/spapr_pci.c | 96 ++++++++++---- > hw/ppc/spapr_rtas_ddw.c | 293 ++++++++++++++++++++++++++++++++++++= ++++++ > hw/ppc/spapr_vio.c | 8 +- > hw/vfio/Makefile.objs | 1 + > hw/vfio/common.c | 174 +++++++++++++++++++------ > hw/vfio/spapr.c | 207 +++++++++++++++++++++++++++++ > include/exec/memory.h | 26 +++- > include/hw/pci-host/spapr.h | 10 +- > include/hw/ppc/spapr.h | 30 ++++- > include/hw/vfio/vfio-common.h | 19 ++- > include/migration/vmstate.h | 10 ++ > memory.c | 26 +++- > trace-events | 10 ++ > 16 files changed, 961 insertions(+), 115 deletions(-) > create mode 100644 hw/ppc/spapr_rtas_ddw.c > create mode 100644 hw/vfio/spapr.c >=20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --1X+6QtwRodzgDPAC Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJXT6nQAAoJEGw4ysog2bOSL7wQAL5eWzMyLzZEOxxFOHypVFdE XfoghVEjDYy5DBd1kdCPpgQiqyekvmwKHFo8yuvqLEqdYe3CAgpI9EvjDhZhES0j igA4vi1k7WX/X1p1ot/7LvA2pVLEA5qbNiwSGKJYU7YUNp/LhPhjlrHTh+AzbqPo OeaDV3cKvQYgAxhO+FBWuvW++9j1Fd2b5e43SePzCryojYStk2578vPOh4qvOM+4 q2VoKngEEsq3G31wNGirrrQFGiazPCvfncV0Yth+JJbrlRR/8FfXOd0D/+SJbcM+ I0E/UWexoS72JgEQMEu6bPqkT4fyec76JGpP+ZjnP9mbaQ+VRXKxV6sspqmV6Et0 VoHVyhmZV2/5eBI26oeL1olrgtL0PQYvwTLRQtPTH0h5pa5TTBgQ9hdAwK5wqgXP Ict5yC+k339A3pZtS8DhgMB5CRYJ89lCJveFNySFGl+lyRhl5bXuaIzYgwtNZk97 Ef76D4nVPoFHOqG20JRPb3kK5/J2djG+3qtX/sIDkqHmhuhFe/05xHLVlJEecVCi 7Eo8p4LKYMWL9uJOHhg2E5yRp2xBIqjzUqVO4I+QFED39+NvANFZipgXmVP8gfYd 7LJxXfTV821JpG3gboISb7kzPy+llF9PgG8RmsPzUAbUr0JvjemKQ/l64afl3p5g 1SgFutyluQWxq/qNaiSL =7DjO -----END PGP SIGNATURE----- --1X+6QtwRodzgDPAC--