From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50559) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bAT3X-0003PR-Fe for qemu-devel@nongnu.org; Tue, 07 Jun 2016 22:17:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bAT3T-0004e3-5F for qemu-devel@nongnu.org; Tue, 07 Jun 2016 22:17:18 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48313) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bAT3S-0004dz-Vj for qemu-devel@nongnu.org; Tue, 07 Jun 2016 22:17:15 -0400 Date: Wed, 8 Jun 2016 10:17:04 +0800 From: Peter Xu Message-ID: <20160608021704.GH1039@pxdev.xzpeter.org> References: <1465145673-5315-1-git-send-email-davidkiarie4@gmail.com> <1465145673-5315-2-git-send-email-davidkiarie4@gmail.com> <20160607191239.GB18662@thinpad.lan.raisama.net> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [RFC] Allow AMD IOMMU to have both SysBusDevice and PCIDevice properties. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Kiarie Cc: Eduardo Habkost , QEMU Developers , imammedo@redhat.com, jasowang@redhat.com, Marcel Apfelbaum , "Michael S. Tsirkin" , pbonzini@redhat.com, Jan Kiszka , rkrcmar@redhat.com, alex.williamson@redhat.com, wexu@redhat.com, Valentine Sinitsyn On Tue, Jun 07, 2016 at 10:32:34PM +0300, David Kiarie wrote: > On Tue, Jun 7, 2016 at 10:12 PM, Eduardo Habkost wrote: > > Hi, > > Hello, > > > > > I didn't review the amd_iommu.c code, but there seems to be some > > unrelated changes in the patch: > > Thanks for looking at this but I actually wanted someone to look at > the amd_iommu.c. I mentioned in annotation that there are some > unrelated changes because this work is based on code that has not been > merged yet. I specifically sent this to have a review in amd_iommu.c > not the details but the design. I have patchset that implements AMD > IOMMU (translation only) which is implemented as a PCI device. It is > however not possible to work on interrupt remapping without converting > AMD IOMMU from a PCI device to a SysBusDevice. This device(AMD IOMMU), > the one on this patch unlike in previous patches, creates to devices ; > a PCI device and a SySBusDev which am not sure is acceptable. I would suggest that you generate another patch, only contains the changes you made related to adding the PCI device for AMD IOMMU, explain bits about what this work is based on (e.g., IMHO it could be based on your v11 AMD patchset and several other patches like Intel IOMMU IR, just mention them in the cover letter), then mark it as a RFC. -- peterx