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From: David Gibson <david@gibson.dropbear.id.au>
To: Thomas Huth <thuth@redhat.com>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 4/5] ppc: Improve PCR bit selection in ppc_set_compat()
Date: Wed, 8 Jun 2016 15:44:48 +1000	[thread overview]
Message-ID: <20160608054448.GV9226@voom.fritz.box> (raw)
In-Reply-To: <1465313980-31281-5-git-send-email-thuth@redhat.com>

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On Tue, Jun 07, 2016 at 05:39:39PM +0200, Thomas Huth wrote:
> When using an olderr PowerISA level, all the upper compatibility
> bits have to be enabled, too. For example when we want to run
> something in PowerISA 2.05 compatibility mode on POWER8, the bit
> for 2.06 has to be set beside the bit for 2.05.
> Additionally, to make sure that we do not set bits that are not
> supported by the host, we apply a mask with the known-to-be-good
> bits here, too.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>

So, this breaks compile on 32-bit targets, because the spr values are
only 32-bit there, and the PCR constants exceed that.  But
ppc_set_compat() is only actually used on 64-bit machines, so I've
added a change to #if it out for 64-bit targets.

> ---
>  target-ppc/translate_init.c | 13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index fa09183..ee2bc14 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -9519,24 +9519,29 @@ void ppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version, Error **errp)
>  {
>      int ret = 0;
>      CPUPPCState *env = &cpu->env;
> +    PowerPCCPUClass *host_pcc;
>  
>      cpu->cpu_version = cpu_version;
>  
>      switch (cpu_version) {
>      case CPU_POWERPC_LOGICAL_2_05:
> -        env->spr[SPR_PCR] = PCR_COMPAT_2_05;
> +        env->spr[SPR_PCR] = PCR_TM_DIS | PCR_VSX_DIS | PCR_COMPAT_2_07 |
> +                            PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
>          break;
>      case CPU_POWERPC_LOGICAL_2_06:
> -        env->spr[SPR_PCR] = PCR_COMPAT_2_06;
> -        break;
>      case CPU_POWERPC_LOGICAL_2_06_PLUS:
> -        env->spr[SPR_PCR] = PCR_COMPAT_2_06;
> +        env->spr[SPR_PCR] = PCR_TM_DIS | PCR_COMPAT_2_07 | PCR_COMPAT_2_06;
>          break;
>      default:
>          env->spr[SPR_PCR] = 0;
>          break;
>      }
>  
> +    host_pcc = kvm_ppc_get_host_cpu_class();
> +    if (host_pcc) {
> +        env->spr[SPR_PCR] &= host_pcc->pcr_mask;
> +    }
> +
>      if (kvm_enabled()) {
>          ret = kvmppc_set_compat(cpu, cpu->cpu_version);
>          if (ret < 0) {

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  parent reply	other threads:[~2016-06-08  5:50 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-07 15:39 [Qemu-devel] [PATCH 0/5] ppc: Improve sPAPR CPU compatibility mode settings Thomas Huth
2016-06-07 15:39 ` [Qemu-devel] [PATCH 1/5] ppc/spapr: Refactor h_client_architecture_support() CPU parsing code Thomas Huth
2016-06-08  0:33   ` Michael Roth
2016-06-07 15:39 ` [Qemu-devel] [PATCH 2/5] ppc: Split pcr_mask settings into supported bits and the register mask Thomas Huth
2016-06-08  0:34   ` Michael Roth
2016-06-07 15:39 ` [Qemu-devel] [PATCH 3/5] ppc: Provide function to get CPU class of the host CPU Thomas Huth
2016-06-08  0:38   ` Michael Roth
2016-06-07 15:39 ` [Qemu-devel] [PATCH 4/5] ppc: Improve PCR bit selection in ppc_set_compat() Thomas Huth
2016-06-08  1:12   ` David Gibson
2016-06-08  6:47     ` Thomas Huth
2016-06-08  5:44   ` David Gibson [this message]
2016-06-08  6:59     ` [Qemu-devel] [Qemu-ppc] " Thomas Huth
2016-06-08  7:24       ` David Gibson
2016-06-08  7:37         ` Thomas Huth
2016-06-07 15:39 ` [Qemu-devel] [PATCH 5/5] ppc: Add PowerISA 2.07 compatibility mode Thomas Huth
2016-06-08  1:11 ` [Qemu-devel] [PATCH 0/5] ppc: Improve sPAPR CPU compatibility mode settings David Gibson

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