From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42430) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bChvh-0004zS-Iu for qemu-devel@nongnu.org; Tue, 14 Jun 2016 02:34:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bChvc-0003uS-SE for qemu-devel@nongnu.org; Tue, 14 Jun 2016 02:34:29 -0400 Date: Tue, 14 Jun 2016 16:34:05 +1000 From: David Gibson Message-ID: <20160614063405.GQ4882@voom.fritz.box> References: <1465795496-15071-1-git-send-email-clg@kaod.org> <1465795496-15071-6-git-send-email-clg@kaod.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="WZLuFERxa6Y0cbOt" Content-Disposition: inline In-Reply-To: <1465795496-15071-6-git-send-email-clg@kaod.org> Subject: Re: [Qemu-devel] [PATCH 05/10] ppc: Fix generation if ISI/DSI vs. HV mode List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-1?Q?C=E9dric?= Le Goater Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Benjamin Herrenschmidt --WZLuFERxa6Y0cbOt Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jun 13, 2016 at 07:24:51AM +0200, C=E9dric Le Goater wrote: > From: Benjamin Herrenschmidt >=20 > Under some circumstances, we need to direct ISI and DSI interrupts > at the hypervisor, turning them into HISI/HDSI, and using different > SPRs (HDSISR and HDAR) depending on the combination of MSR_DR and > the corresponding VPM bits in LPCR. >=20 > This moves part of the code into helpers that are fixed to select > the right exception type and registers. On pre-P7 processors, LPCR > is 0 which provides the old behaviour of directing the interrupts > at the supervisor. >=20 > Thanks to Andrei Warkentin for finding a bug when HV=3D1 >=20 > Signed-off-by: Benjamin Herrenschmidt > Reviewed-by: David Gibson > --- > target-ppc/mmu-hash64.c | 69 +++++++++++++++++++++++++++++++++++--------= ------ > 1 file changed, 50 insertions(+), 19 deletions(-) >=20 > diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c > index 668da5e22653..072a952c8bd5 100644 > --- a/target-ppc/mmu-hash64.c > +++ b/target-ppc/mmu-hash64.c > @@ -613,6 +613,47 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU= *cpu, > return 0; > } > =20 > +static void ppc_hash64_set_isi(CPUState *cs, CPUPPCState *env, > + uint64_t error_code) > +{ > + bool vpm; > + > + if (msr_ir) { > + vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM1); > + } else { > + vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM0); > + } > + if (vpm && !msr_hv) { > + cs->exception_index =3D POWERPC_EXCP_HISI; In the ISI case, you use HISI if !msr_hv.. > + } else { > + cs->exception_index =3D POWERPC_EXCP_ISI; > + } > + env->error_code =3D error_code; > +} > + > +static void ppc_hash64_set_dsi(CPUState *cs, CPUPPCState *env, uint64_t = dar, > + uint64_t dsisr) > +{ > + bool vpm; > + > + if (msr_dr) { > + vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM1); > + } else { > + vpm =3D !!(env->spr[SPR_LPCR] & LPCR_VPM0); > + } > + if (vpm && msr_hv) { > + cs->exception_index =3D POWERPC_EXCP_HDSI; =2E.but in the DSI case you use HDSI if msr_hv. Is that really right? > + env->spr[SPR_HDAR] =3D dar; > + env->spr[SPR_HDSISR] =3D dsisr; > + } else { > + cs->exception_index =3D POWERPC_EXCP_DSI; > + env->spr[SPR_DAR] =3D dar; > + env->spr[SPR_DSISR] =3D dsisr; > + } > + env->error_code =3D 0; > +} > + > + > int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, > int rwx, int mmu_idx) > { > @@ -623,7 +664,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vadd= r eaddr, > hwaddr pte_offset; > ppc_hash_pte64_t pte; > int pp_prot, amr_prot, prot; > - uint64_t new_pte1; > + uint64_t new_pte1, dsisr; > const int need_prot[] =3D {PAGE_READ, PAGE_WRITE, PAGE_EXEC}; > hwaddr raddr; > =20 > @@ -657,26 +698,21 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, va= ddr eaddr, > =20 > /* 3. Check for segment level no-execute violation */ > if ((rwx =3D=3D 2) && (slb->vsid & SLB_VSID_N)) { > - cs->exception_index =3D POWERPC_EXCP_ISI; > - env->error_code =3D 0x10000000; > + ppc_hash64_set_isi(cs, env, 0x10000000); > return 1; > } > =20 > /* 4. Locate the PTE in the hash table */ > pte_offset =3D ppc_hash64_htab_lookup(cpu, slb, eaddr, &pte); > if (pte_offset =3D=3D -1) { > + dsisr =3D 0x40000000; > if (rwx =3D=3D 2) { > - cs->exception_index =3D POWERPC_EXCP_ISI; > - env->error_code =3D 0x40000000; > + ppc_hash64_set_isi(cs, env, dsisr); > } else { > - cs->exception_index =3D POWERPC_EXCP_DSI; > - env->error_code =3D 0; > - env->spr[SPR_DAR] =3D eaddr; > if (rwx =3D=3D 1) { > - env->spr[SPR_DSISR] =3D 0x42000000; > - } else { > - env->spr[SPR_DSISR] =3D 0x40000000; > + dsisr |=3D 0x02000000; > } > + ppc_hash64_set_dsi(cs, env, eaddr, dsisr); > } > return 1; > } > @@ -705,14 +741,9 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vad= dr eaddr, > /* Access right violation */ > qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n"); > if (rwx =3D=3D 2) { > - cs->exception_index =3D POWERPC_EXCP_ISI; > - env->error_code =3D 0x08000000; > + ppc_hash64_set_isi(cs, env, 0x08000000); > } else { > - target_ulong dsisr =3D 0; > - > - cs->exception_index =3D POWERPC_EXCP_DSI; > - env->error_code =3D 0; > - env->spr[SPR_DAR] =3D eaddr; > + dsisr =3D 0; > if (need_prot[rwx] & ~pp_prot) { > dsisr |=3D 0x08000000; > } > @@ -722,7 +753,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vadd= r eaddr, > if (need_prot[rwx] & ~amr_prot) { > dsisr |=3D 0x00200000; > } > - env->spr[SPR_DSISR] =3D dsisr; > + ppc_hash64_set_dsi(cs, env, eaddr, dsisr); > } > return 1; > } --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --WZLuFERxa6Y0cbOt Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJXX6VdAAoJEGw4ysog2bOSH/UQAI2W2I/o7yEqsSZRQQ5q1EVe xPCq8c93Ybza20zTctUY/5SNVmT/dH5g/oa6idISZh0zfL+/rEPWpkLxAZ21a3Jf 2VaHZbxWsm/1PVEFCgGJ75GL9eluWHYcbwRPfIPQKOZivcZ6zFN9shTb4MU4xUX7 pim4TKsFiC84mSlfSqnrC6rPRb49Xak/g9AmvXt9eXYthMhIE/T2rppLivzsvD1+ 98tF7aoYLFJZeh2bUg9IZ4ONp5OYxF3fNiuog023Sp3RWkW0brQZndeHLzK6dBCU eA7GlmloBwi1hH2ztSqaM3McJct7Phs+DOWAFRt750e2Jkb7p5kdCqMikHl86lf6 wn8vfSoICnsErG9HOn5qdkUJcUxMj4xatPaJ8nX9iq2L2N43pcuLZr2+rbORzTs/ /5i8z4RT1L9SYyJ0h0M4er7tv8Ne1/DFUrzIfqDcqtiKVY/aSiYrsVYV2+jOnadP B1iRzc2yInKFQN/UdxoNEGT7c5jCDnf/+JMDBF2hnAoQM73kbIE9iMw20oCTkztA yUrQNx8O1o8ly5df0EZh3mL6kL+UiA1Pz3E7+g+F+eA2hWN0x4TLIH5xkMnjSaPj 7M9Y6tksOmwgatk6xodIqpkdRLSbcXVJtEuiAPGYAmXgBZDBNjJNXCpwdW61xwEW 4NEYStcW7E5Ckdl32Djp =vLkF -----END PGP SIGNATURE----- --WZLuFERxa6Y0cbOt--