From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45718) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDQE2-0001Bx-LF for qemu-devel@nongnu.org; Thu, 16 Jun 2016 01:52:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bDQDx-00070a-K8 for qemu-devel@nongnu.org; Thu, 16 Jun 2016 01:52:21 -0400 Date: Thu, 16 Jun 2016 15:19:28 +1000 From: David Gibson Message-ID: <20160616051928.GA1642@voom.fritz.box> References: <1464318298-2456-1-git-send-email-david@gibson.dropbear.id.au> <1464318298-2456-4-git-send-email-david@gibson.dropbear.id.au> <20160615221719.12f246dd@kryten> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="7AUc2qLy4jB3hD7Z" Content-Disposition: inline In-Reply-To: <20160615221719.12f246dd@kryten> Subject: Re: [Qemu-devel] [PULL 03/13] target-ppc: Use 32-bit rotate instead of deposit + 64-bit rotate List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anton Blanchard Cc: peter.maydell@linaro.org, Richard Henderson , qemu-ppc@nongnu.org, agraf@suse.de, qemu-devel@nongnu.org --7AUc2qLy4jB3hD7Z Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jun 15, 2016 at 10:17:19PM +1000, Anton Blanchard wrote: > Hi, >=20 > > From: Richard Henderson > >=20 > > A 32-bit rotate insn is more common on hosts than a deposit insn, > > and if the host has neither the result is truely horrific. > >=20 > > At the same time, tidy up the temporaries within these functions, > > drop the over-use of "likely", drop some checks for identity that > > will also be checked by tcg-op.c functions, and special case mask > > without rotate within rlwinm. >=20 > This breaks masks that wrap: >=20 > li r3,-1 > li r4,-1 > rlwnm r3,r3,r4,22,8 >=20 > We expect: >=20 > ffffffffff8003ff >=20 > But get: >=20 > ff8003ff >=20 > Anton Bother. I've tentatively put a revert into ppc-for-2.7. Richard, do you have a better idea how to fix it? >=20 > > Signed-off-by: Richard Henderson > > Signed-off-by: David Gibson > > --- > > target-ppc/translate.c | 172 > > ++++++++++++++++++++----------------------------- 1 file changed, 70 > > insertions(+), 102 deletions(-) > >=20 > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > > index 3ea6625..b392ecc 100644 > > --- a/target-ppc/translate.c > > +++ b/target-ppc/translate.c > > @@ -1610,141 +1610,109 @@ static void gen_cntlzd(DisasContext *ctx) > > /* rlwimi & rlwimi. */ > > static void gen_rlwimi(DisasContext *ctx) > > { > > - uint32_t mb, me, sh; > > - > > - mb =3D MB(ctx->opcode); > > - me =3D ME(ctx->opcode); > > - sh =3D SH(ctx->opcode); > > - if (likely(sh =3D=3D (31-me) && mb <=3D me)) { > > - tcg_gen_deposit_tl(cpu_gpr[rA(ctx->opcode)], > > cpu_gpr[rA(ctx->opcode)], > > - cpu_gpr[rS(ctx->opcode)], sh, me - mb + > > 1); > > + TCGv t_ra =3D cpu_gpr[rA(ctx->opcode)]; > > + TCGv t_rs =3D cpu_gpr[rS(ctx->opcode)]; > > + uint32_t sh =3D SH(ctx->opcode); > > + uint32_t mb =3D MB(ctx->opcode); > > + uint32_t me =3D ME(ctx->opcode); > > + > > + if (sh =3D=3D (31-me) && mb <=3D me) { > > + tcg_gen_deposit_tl(t_ra, t_ra, t_rs, sh, me - mb + 1); > > } else { > > target_ulong mask; > > + TCGv_i32 t0; > > TCGv t1; > > - TCGv t0 =3D tcg_temp_new(); > > -#if defined(TARGET_PPC64) > > - tcg_gen_deposit_i64(t0, cpu_gpr[rS(ctx->opcode)], > > - cpu_gpr[rS(ctx->opcode)], 32, 32); > > - tcg_gen_rotli_i64(t0, t0, sh); > > -#else > > - tcg_gen_rotli_i32(t0, cpu_gpr[rS(ctx->opcode)], sh); > > -#endif > > + > > #if defined(TARGET_PPC64) > > mb +=3D 32; > > me +=3D 32; > > #endif > > mask =3D MASK(mb, me); > > + > > + t0 =3D tcg_temp_new_i32(); > > t1 =3D tcg_temp_new(); > > - tcg_gen_andi_tl(t0, t0, mask); > > - tcg_gen_andi_tl(t1, cpu_gpr[rA(ctx->opcode)], ~mask); > > - tcg_gen_or_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); > > - tcg_temp_free(t0); > > + tcg_gen_trunc_tl_i32(t0, t_rs); > > + tcg_gen_rotli_i32(t0, t0, sh); > > + tcg_gen_extu_i32_tl(t1, t0); > > + tcg_temp_free_i32(t0); > > + > > + tcg_gen_andi_tl(t1, t1, mask); > > + tcg_gen_andi_tl(t_ra, t_ra, ~mask); > > + tcg_gen_or_tl(t_ra, t_ra, t1); > > tcg_temp_free(t1); > > } > > - if (unlikely(Rc(ctx->opcode) !=3D 0)) > > - gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); > > + if (unlikely(Rc(ctx->opcode) !=3D 0)) { > > + gen_set_Rc0(ctx, t_ra); > > + } > > } > > =20 > > /* rlwinm & rlwinm. */ > > static void gen_rlwinm(DisasContext *ctx) > > { > > - uint32_t mb, me, sh; > > - > > - sh =3D SH(ctx->opcode); > > - mb =3D MB(ctx->opcode); > > - me =3D ME(ctx->opcode); > > + TCGv t_ra =3D cpu_gpr[rA(ctx->opcode)]; > > + TCGv t_rs =3D cpu_gpr[rS(ctx->opcode)]; > > + uint32_t sh =3D SH(ctx->opcode); > > + uint32_t mb =3D MB(ctx->opcode); > > + uint32_t me =3D ME(ctx->opcode); > > =20 > > - if (likely(mb =3D=3D 0 && me =3D=3D (31 - sh))) { > > - if (likely(sh =3D=3D 0)) { > > - tcg_gen_ext32u_tl(cpu_gpr[rA(ctx->opcode)], > > cpu_gpr[rS(ctx->opcode)]); > > - } else { > > - TCGv t0 =3D tcg_temp_new(); > > - tcg_gen_ext32u_tl(t0, cpu_gpr[rS(ctx->opcode)]); > > - tcg_gen_shli_tl(t0, t0, sh); > > - tcg_gen_ext32u_tl(cpu_gpr[rA(ctx->opcode)], t0); > > - tcg_temp_free(t0); > > - } > > - } else if (likely(sh !=3D 0 && me =3D=3D 31 && sh =3D=3D (32 - mb)= )) { > > - TCGv t0 =3D tcg_temp_new(); > > - tcg_gen_ext32u_tl(t0, cpu_gpr[rS(ctx->opcode)]); > > - tcg_gen_shri_tl(t0, t0, mb); > > - tcg_gen_ext32u_tl(cpu_gpr[rA(ctx->opcode)], t0); > > - tcg_temp_free(t0); > > - } else if (likely(mb =3D=3D 0 && me =3D=3D 31)) { > > - TCGv_i32 t0 =3D tcg_temp_new_i32(); > > - tcg_gen_trunc_tl_i32(t0, cpu_gpr[rS(ctx->opcode)]); > > - tcg_gen_rotli_i32(t0, t0, sh); > > - tcg_gen_extu_i32_tl(cpu_gpr[rA(ctx->opcode)], t0); > > - tcg_temp_free_i32(t0); > > + if (mb =3D=3D 0 && me =3D=3D (31 - sh)) { > > + tcg_gen_shli_tl(t_ra, t_rs, sh); > > + tcg_gen_ext32u_tl(t_ra, t_ra); > > + } else if (sh !=3D 0 && me =3D=3D 31 && sh =3D=3D (32 - mb)) { > > + tcg_gen_ext32u_tl(t_ra, t_rs); > > + tcg_gen_shri_tl(t_ra, t_ra, mb); > > } else { > > - TCGv t0 =3D tcg_temp_new(); > > -#if defined(TARGET_PPC64) > > - tcg_gen_deposit_i64(t0, cpu_gpr[rS(ctx->opcode)], > > - cpu_gpr[rS(ctx->opcode)], 32, 32); > > - tcg_gen_rotli_i64(t0, t0, sh); > > -#else > > - tcg_gen_rotli_i32(t0, cpu_gpr[rS(ctx->opcode)], sh); > > -#endif > > #if defined(TARGET_PPC64) > > mb +=3D 32; > > me +=3D 32; > > #endif > > - tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], t0, MASK(mb, me)); > > - tcg_temp_free(t0); > > + if (sh =3D=3D 0) { > > + tcg_gen_andi_tl(t_ra, t_rs, MASK(mb, me)); > > + } else { > > + TCGv_i32 t0 =3D tcg_temp_new_i32(); > > + > > + tcg_gen_trunc_tl_i32(t0, t_rs); > > + tcg_gen_rotli_i32(t0, t0, sh); > > + tcg_gen_andi_i32(t0, t0, MASK(mb, me)); > > + tcg_gen_extu_i32_tl(t_ra, t0); > > + tcg_temp_free_i32(t0); > > + } > > + } > > + if (unlikely(Rc(ctx->opcode) !=3D 0)) { > > + gen_set_Rc0(ctx, t_ra); > > } > > - if (unlikely(Rc(ctx->opcode) !=3D 0)) > > - gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); > > } > > =20 > > /* rlwnm & rlwnm. */ > > static void gen_rlwnm(DisasContext *ctx) > > { > > - uint32_t mb, me; > > - mb =3D MB(ctx->opcode); > > - me =3D ME(ctx->opcode); > > + TCGv t_ra =3D cpu_gpr[rA(ctx->opcode)]; > > + TCGv t_rs =3D cpu_gpr[rS(ctx->opcode)]; > > + TCGv t_rb =3D cpu_gpr[rB(ctx->opcode)]; > > + uint32_t mb =3D MB(ctx->opcode); > > + uint32_t me =3D ME(ctx->opcode); > > + TCGv_i32 t0, t1; > > =20 > > - if (likely(mb =3D=3D 0 && me =3D=3D 31)) { > > - TCGv_i32 t0, t1; > > - t0 =3D tcg_temp_new_i32(); > > - t1 =3D tcg_temp_new_i32(); > > - tcg_gen_trunc_tl_i32(t0, cpu_gpr[rB(ctx->opcode)]); > > - tcg_gen_trunc_tl_i32(t1, cpu_gpr[rS(ctx->opcode)]); > > - tcg_gen_andi_i32(t0, t0, 0x1f); > > - tcg_gen_rotl_i32(t1, t1, t0); > > - tcg_gen_extu_i32_tl(cpu_gpr[rA(ctx->opcode)], t1); > > - tcg_temp_free_i32(t0); > > - tcg_temp_free_i32(t1); > > - } else { > > - TCGv t0; > > #if defined(TARGET_PPC64) > > - TCGv t1; > > + mb +=3D 32; > > + me +=3D 32; > > #endif > > =20 > > - t0 =3D tcg_temp_new(); > > - tcg_gen_andi_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x1f); > > -#if defined(TARGET_PPC64) > > - t1 =3D tcg_temp_new_i64(); > > - tcg_gen_deposit_i64(t1, cpu_gpr[rS(ctx->opcode)], > > - cpu_gpr[rS(ctx->opcode)], 32, 32); > > - tcg_gen_rotl_i64(t0, t1, t0); > > - tcg_temp_free_i64(t1); > > -#else > > - tcg_gen_rotl_i32(t0, cpu_gpr[rS(ctx->opcode)], t0); > > -#endif > > - if (unlikely(mb !=3D 0 || me !=3D 31)) { > > -#if defined(TARGET_PPC64) > > - mb +=3D 32; > > - me +=3D 32; > > -#endif > > - tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], t0, MASK(mb, > > me)); > > - } else { > > - tcg_gen_andi_tl(t0, t0, MASK(32, 63)); > > - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], t0); > > - } > > - tcg_temp_free(t0); > > + t0 =3D tcg_temp_new_i32(); > > + t1 =3D tcg_temp_new_i32(); > > + tcg_gen_trunc_tl_i32(t0, t_rb); > > + tcg_gen_trunc_tl_i32(t1, t_rs); > > + tcg_gen_andi_i32(t0, t0, 0x1f); > > + tcg_gen_rotl_i32(t1, t1, t0); > > + tcg_temp_free_i32(t0); > > + > > + tcg_gen_andi_i32(t1, t1, MASK(mb, me)); > > + tcg_gen_extu_i32_tl(t_ra, t1); > > + tcg_temp_free_i32(t1); > > + > > + if (unlikely(Rc(ctx->opcode) !=3D 0)) { > > + gen_set_Rc0(ctx, t_ra); > > } > > - if (unlikely(Rc(ctx->opcode) !=3D 0)) > > - gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); > > } > > =20 > > #if defined(TARGET_PPC64) >=20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --7AUc2qLy4jB3hD7Z Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJXYjbgAAoJEGw4ysog2bOStw0QAOCkfTnTG2+oJ69gbruz1pUP JSoQHmSomOucItPuLd/7pkXCt1vsowMEwdn3HPSdaVb5+iWIyqkJ/gSS3eGvAR/p FrWfCOSqq83xwtwg1ZovnmhH6TqlS/syH89STLkueIbJJnmncehnVR+CPoJh112M XmwhMEcKz4UWgdCyrJODnBHzh4+it3i/1/J33uv/lcldO0MRRv1zUKymyap6ZS+/ QK0DZio5UzApS1Mspmk3OfC3fhGOaoIT1QYLBDfy8ZhnMxfGIz2ZLRUvq/sm4dEK +6SY3Fxsdnn2/ynY73KyG7vsBf5Zm+SqRUOIFAYr5D6gSKa2HNojpCZSg7GA1WYY ij6+SG+czNNnd1gpCHDpBlSqH43RODsAFeyWyfHcbQzj5b3lv1tP/Py8HGiPxK05 Jb6fg1mjAwOi1jjVprqzvbAcWPTWWNDYG9WB20izOsmGjVZFRtZTggq6LcGEyuHO mh6CDM6aNGpWjgBvBv6Mt97Vf4Eut+NHpNm0hfpwlQeTIzGVMSYCIUEKM7d0t1tl lKKlyX7QK/WwozEQafhfcdQgxvCys0w099GnX4LaXshVm6Ux6J0EFBgA4E9g+JBn Ju7gXyhoyFPGx6RevicCoLWVtT1bwXgJT2fk8AMUNMyvPfUeb2XqVQq8Igb5pxOe 6ze2mtI2m/Mq1ks+Wiho =3jmj -----END PGP SIGNATURE----- --7AUc2qLy4jB3hD7Z--