From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47716) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDQRv-00079U-3m for qemu-devel@nongnu.org; Thu, 16 Jun 2016 02:06:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bDQRp-0001Wq-0c for qemu-devel@nongnu.org; Thu, 16 Jun 2016 02:06:42 -0400 Received: from mga14.intel.com ([192.55.52.115]:39631) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDQRo-0001UZ-7P for qemu-devel@nongnu.org; Thu, 16 Jun 2016 02:06:36 -0400 From: Haozhong Zhang Date: Thu, 16 Jun 2016 14:06:20 +0800 Message-Id: <20160616060621.30422-3-haozhong.zhang@intel.com> In-Reply-To: <20160616060621.30422-1-haozhong.zhang@intel.com> References: <20160616060621.30422-1-haozhong.zhang@intel.com> Subject: [Qemu-devel] [PATCH v4 2/3] target-i386: add migration support for Intel LMCE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcelo Tosatti , kvm@vger.kernel.org, Boris Petkov , Tony Luck , Andi Kleen , rkrcmar@redhat.com, Ashok Raj , Haozhong Zhang Migration is only allowed between VCPUs with the same lmce option. Signed-off-by: Haozhong Zhang --- target-i386/machine.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/target-i386/machine.c b/target-i386/machine.c index cb9adf2..00375a3 100644 --- a/target-i386/machine.c +++ b/target-i386/machine.c @@ -347,6 +347,12 @@ static int cpu_post_load(void *opaque, int version_id) return -EINVAL; } + if (!cpu->enable_lmce && (env->mcg_cap & MCG_LMCE_P)) { + error_report("Config mismatch: VCPU has LMCE enabled, " + "but \"lmce\" option is disabled"); + return -EINVAL; + } + /* * Real mode guest segments register DPL should be zero. * Older KVM version were setting it wrongly. @@ -896,6 +902,24 @@ static const VMStateDescription vmstate_tsc_khz = { } }; +static bool mcg_ext_ctl_needed(void *opaque) +{ + X86CPU *cpu = opaque; + CPUX86State *env = &cpu->env; + return cpu->enable_lmce && env->mcg_ext_ctl; +} + +static const VMStateDescription vmstate_mcg_ext_ctl = { + .name = "cpu/mcg_ext_ctl", + .version_id = 1, + .minimum_version_id = 1, + .needed = mcg_ext_ctl_needed, + .fields = (VMStateField[]) { + VMSTATE_UINT64(env.mcg_ext_ctl, X86CPU), + VMSTATE_END_OF_LIST() + } +}; + VMStateDescription vmstate_x86_cpu = { .name = "cpu", .version_id = 12, @@ -1022,6 +1046,7 @@ VMStateDescription vmstate_x86_cpu = { #ifdef TARGET_X86_64 &vmstate_pkru, #endif + &vmstate_mcg_ext_ctl, NULL } }; -- 2.9.0