* [Qemu-devel] [PATCH v2] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL
@ 2016-06-17 7:20 Haozhong Zhang
2016-06-17 7:29 ` Paolo Bonzini
2016-06-17 15:26 ` [Qemu-devel] [SeaBIOS] " Kevin O'Connor
0 siblings, 2 replies; 4+ messages in thread
From: Haozhong Zhang @ 2016-06-17 7:20 UTC (permalink / raw)
To: seabios; +Cc: Paolo Bonzini, qemu-devel, Haozhong Zhang
OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
"etc/msr_feature_control" to advise bits that should be set in
MSR_IA32_FEATURE_CONTROL. If this file exists, SeaBIOS will set the
advised bits in that MSR.
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
---
Changes in v2:
* Call msr_feature_control_setup() before smp_setup().
* Use wrmsr_smp() instead of wrmsr() on BSP.
* Rename smp_mtrr and smp_mtrr_count to smp_msr and smp_msr_count
as they are not only used for MTRR now.
---
Makefile | 2 +-
src/fw/msr_feature_control.c | 16 ++++++++++++++++
src/fw/paravirt.c | 3 ++-
src/fw/smp.c | 20 ++++++++++----------
src/util.h | 3 +++
5 files changed, 32 insertions(+), 12 deletions(-)
create mode 100644 src/fw/msr_feature_control.c
diff --git a/Makefile b/Makefile
index 4930b3a..f38a075 100644
--- a/Makefile
+++ b/Makefile
@@ -43,7 +43,7 @@ SRC32FLAT=$(SRCBOTH) post.c e820map.c malloc.c romfile.c x86.c optionroms.c \
fw/paravirt.c fw/shadow.c fw/pciinit.c fw/smm.c fw/smp.c fw/mtrr.c fw/xen.c \
fw/acpi.c fw/mptable.c fw/pirtable.c fw/smbios.c fw/romfile_loader.c \
hw/virtio-ring.c hw/virtio-pci.c hw/virtio-blk.c hw/virtio-scsi.c \
- hw/tpm_drivers.c
+ hw/tpm_drivers.c fw/msr_feature_control.c
SRC32SEG=string.c output.c pcibios.c apm.c stacks.c hw/pci.c hw/serialio.c
DIRS=src src/hw src/fw vgasrc
diff --git a/src/fw/msr_feature_control.c b/src/fw/msr_feature_control.c
new file mode 100644
index 0000000..5ddc051
--- /dev/null
+++ b/src/fw/msr_feature_control.c
@@ -0,0 +1,16 @@
+#include "util.h" // msr_feature_control_setup, wrmsr_smp
+#include "romfile.h" // romfile_find
+
+#define MSR_IA32_FEATURE_CONTROL 0x0000003a
+
+void msr_feature_control_setup(void)
+{
+ struct romfile_s *f = romfile_find("etc/msr_feature_control");
+ if (!f)
+ return;
+
+ u64 feature_control_bits;
+ f->copy(f, &feature_control_bits, sizeof(feature_control_bits));
+ if (feature_control_bits)
+ wrmsr_smp(MSR_IA32_FEATURE_CONTROL, feature_control_bits);
+}
diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
index 8ed4380..dbb3406 100644
--- a/src/fw/paravirt.c
+++ b/src/fw/paravirt.c
@@ -149,8 +149,9 @@ qemu_platform_setup(void)
smm_device_setup();
smm_setup();
- // Initialize mtrr and smp
+ // Initialize mtrr, msr_feature_control and smp
mtrr_setup();
+ msr_feature_control_setup();
smp_setup();
// Create bios tables
diff --git a/src/fw/smp.c b/src/fw/smp.c
index 579acdb..6e706e4 100644
--- a/src/fw/smp.c
+++ b/src/fw/smp.c
@@ -10,7 +10,7 @@
#include "output.h" // dprintf
#include "romfile.h" // romfile_loadint
#include "stacks.h" // yield
-#include "util.h" // smp_setup
+#include "util.h" // smp_setup, msr_feature_control_setup
#include "x86.h" // wrmsr
#define APIC_ICR_LOW ((u8*)BUILD_APIC_ADDR + 0x300)
@@ -20,20 +20,20 @@
#define APIC_ENABLED 0x0100
-static struct { u32 index; u64 val; } smp_mtrr[32];
-static u32 smp_mtrr_count;
+static struct { u32 index; u64 val; } smp_msr[32];
+static u32 smp_msr_count;
void
wrmsr_smp(u32 index, u64 val)
{
wrmsr(index, val);
- if (smp_mtrr_count >= ARRAY_SIZE(smp_mtrr)) {
+ if (smp_msr_count >= ARRAY_SIZE(smp_msr)) {
warn_noalloc();
return;
}
- smp_mtrr[smp_mtrr_count].index = index;
- smp_mtrr[smp_mtrr_count].val = val;
- smp_mtrr_count++;
+ smp_msr[smp_msr_count].index = index;
+ smp_msr[smp_msr_count].val = val;
+ smp_msr_count++;
}
u32 MaxCountCPUs;
@@ -58,10 +58,10 @@ handle_smp(void)
u8 apic_id = ebx>>24;
dprintf(DEBUG_HDL_smp, "handle_smp: apic_id=%d\n", apic_id);
- // MTRR setup
+ // MTRR and MSR_IA32_FEATURE_CONTROL setup
int i;
- for (i=0; i<smp_mtrr_count; i++)
- wrmsr(smp_mtrr[i].index, smp_mtrr[i].val);
+ for (i=0; i<smp_msr_count; i++)
+ wrmsr(smp_msr[i].index, smp_msr[i].val);
// Set bit on FoundAPICIDs
FoundAPICIDs[apic_id/32] |= (1 << (apic_id % 32));
diff --git a/src/util.h b/src/util.h
index 7b41207..61877fa 100644
--- a/src/util.h
+++ b/src/util.h
@@ -103,6 +103,9 @@ int csm_bootprio_pci(struct pci_device *pci);
// fw/mptable.c
void mptable_setup(void);
+// fw/msr_feature_control.c
+void msr_feature_control_setup(void);
+
// fw/mtrr.c
void mtrr_setup(void);
--
2.9.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH v2] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL
2016-06-17 7:20 [Qemu-devel] [PATCH v2] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL Haozhong Zhang
@ 2016-06-17 7:29 ` Paolo Bonzini
2016-06-17 15:26 ` [Qemu-devel] [SeaBIOS] " Kevin O'Connor
1 sibling, 0 replies; 4+ messages in thread
From: Paolo Bonzini @ 2016-06-17 7:29 UTC (permalink / raw)
To: Haozhong Zhang; +Cc: seabios, qemu-devel
> Changes in v2:
> * Call msr_feature_control_setup() before smp_setup().
> * Use wrmsr_smp() instead of wrmsr() on BSP.
> * Rename smp_mtrr and smp_mtrr_count to smp_msr and smp_msr_count
> as they are not only used for MTRR now.
> ---
> Makefile | 2 +-
> src/fw/msr_feature_control.c | 16 ++++++++++++++++
> src/fw/paravirt.c | 3 ++-
> src/fw/smp.c | 20 ++++++++++----------
> src/util.h | 3 +++
> 5 files changed, 32 insertions(+), 12 deletions(-)
> create mode 100644 src/fw/msr_feature_control.c
>
> diff --git a/Makefile b/Makefile
> index 4930b3a..f38a075 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -43,7 +43,7 @@ SRC32FLAT=$(SRCBOTH) post.c e820map.c malloc.c romfile.c
> x86.c optionroms.c \
> fw/paravirt.c fw/shadow.c fw/pciinit.c fw/smm.c fw/smp.c fw/mtrr.c
> fw/xen.c \
> fw/acpi.c fw/mptable.c fw/pirtable.c fw/smbios.c fw/romfile_loader.c \
> hw/virtio-ring.c hw/virtio-pci.c hw/virtio-blk.c hw/virtio-scsi.c \
> - hw/tpm_drivers.c
> + hw/tpm_drivers.c fw/msr_feature_control.c
> SRC32SEG=string.c output.c pcibios.c apm.c stacks.c hw/pci.c hw/serialio.c
> DIRS=src src/hw src/fw vgasrc
>
> diff --git a/src/fw/msr_feature_control.c b/src/fw/msr_feature_control.c
> new file mode 100644
> index 0000000..5ddc051
> --- /dev/null
> +++ b/src/fw/msr_feature_control.c
> @@ -0,0 +1,16 @@
> +#include "util.h" // msr_feature_control_setup, wrmsr_smp
> +#include "romfile.h" // romfile_find
> +
> +#define MSR_IA32_FEATURE_CONTROL 0x0000003a
> +
> +void msr_feature_control_setup(void)
> +{
> + struct romfile_s *f = romfile_find("etc/msr_feature_control");
> + if (!f)
> + return;
> +
> + u64 feature_control_bits;
> + f->copy(f, &feature_control_bits, sizeof(feature_control_bits));
> + if (feature_control_bits)
> + wrmsr_smp(MSR_IA32_FEATURE_CONTROL, feature_control_bits);
> +}
> diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
> index 8ed4380..dbb3406 100644
> --- a/src/fw/paravirt.c
> +++ b/src/fw/paravirt.c
> @@ -149,8 +149,9 @@ qemu_platform_setup(void)
> smm_device_setup();
> smm_setup();
>
> - // Initialize mtrr and smp
> + // Initialize mtrr, msr_feature_control and smp
> mtrr_setup();
> + msr_feature_control_setup();
> smp_setup();
>
> // Create bios tables
> diff --git a/src/fw/smp.c b/src/fw/smp.c
> index 579acdb..6e706e4 100644
> --- a/src/fw/smp.c
> +++ b/src/fw/smp.c
> @@ -10,7 +10,7 @@
> #include "output.h" // dprintf
> #include "romfile.h" // romfile_loadint
> #include "stacks.h" // yield
> -#include "util.h" // smp_setup
> +#include "util.h" // smp_setup, msr_feature_control_setup
> #include "x86.h" // wrmsr
>
> #define APIC_ICR_LOW ((u8*)BUILD_APIC_ADDR + 0x300)
> @@ -20,20 +20,20 @@
>
> #define APIC_ENABLED 0x0100
>
> -static struct { u32 index; u64 val; } smp_mtrr[32];
> -static u32 smp_mtrr_count;
> +static struct { u32 index; u64 val; } smp_msr[32];
> +static u32 smp_msr_count;
>
> void
> wrmsr_smp(u32 index, u64 val)
> {
> wrmsr(index, val);
> - if (smp_mtrr_count >= ARRAY_SIZE(smp_mtrr)) {
> + if (smp_msr_count >= ARRAY_SIZE(smp_msr)) {
> warn_noalloc();
> return;
> }
> - smp_mtrr[smp_mtrr_count].index = index;
> - smp_mtrr[smp_mtrr_count].val = val;
> - smp_mtrr_count++;
> + smp_msr[smp_msr_count].index = index;
> + smp_msr[smp_msr_count].val = val;
> + smp_msr_count++;
> }
>
> u32 MaxCountCPUs;
> @@ -58,10 +58,10 @@ handle_smp(void)
> u8 apic_id = ebx>>24;
> dprintf(DEBUG_HDL_smp, "handle_smp: apic_id=%d\n", apic_id);
>
> - // MTRR setup
> + // MTRR and MSR_IA32_FEATURE_CONTROL setup
> int i;
> - for (i=0; i<smp_mtrr_count; i++)
> - wrmsr(smp_mtrr[i].index, smp_mtrr[i].val);
> + for (i=0; i<smp_msr_count; i++)
> + wrmsr(smp_msr[i].index, smp_msr[i].val);
>
> // Set bit on FoundAPICIDs
> FoundAPICIDs[apic_id/32] |= (1 << (apic_id % 32));
> diff --git a/src/util.h b/src/util.h
> index 7b41207..61877fa 100644
> --- a/src/util.h
> +++ b/src/util.h
> @@ -103,6 +103,9 @@ int csm_bootprio_pci(struct pci_device *pci);
> // fw/mptable.c
> void mptable_setup(void);
>
> +// fw/msr_feature_control.c
> +void msr_feature_control_setup(void);
> +
> // fw/mtrr.c
> void mtrr_setup(void);
>
> --
> 2.9.0
>
>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [SeaBIOS] [PATCH v2] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL
2016-06-17 7:20 [Qemu-devel] [PATCH v2] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL Haozhong Zhang
2016-06-17 7:29 ` Paolo Bonzini
@ 2016-06-17 15:26 ` Kevin O'Connor
2016-06-20 1:06 ` Haozhong Zhang
1 sibling, 1 reply; 4+ messages in thread
From: Kevin O'Connor @ 2016-06-17 15:26 UTC (permalink / raw)
To: Haozhong Zhang; +Cc: seabios, Paolo Bonzini, qemu-devel
On Fri, Jun 17, 2016 at 03:20:10PM +0800, Haozhong Zhang wrote:
> OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
> for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
> "etc/msr_feature_control" to advise bits that should be set in
> MSR_IA32_FEATURE_CONTROL. If this file exists, SeaBIOS will set the
> advised bits in that MSR.
Thanks - see my comments below.
> --- /dev/null
> +++ b/src/fw/msr_feature_control.c
> @@ -0,0 +1,16 @@
> +#include "util.h" // msr_feature_control_setup, wrmsr_smp
> +#include "romfile.h" // romfile_find
> +
> +#define MSR_IA32_FEATURE_CONTROL 0x0000003a
> +
> +void msr_feature_control_setup(void)
> +{
> + struct romfile_s *f = romfile_find("etc/msr_feature_control");
> + if (!f)
> + return;
> +
> + u64 feature_control_bits;
> + f->copy(f, &feature_control_bits, sizeof(feature_control_bits));
> + if (feature_control_bits)
> + wrmsr_smp(MSR_IA32_FEATURE_CONTROL, feature_control_bits);
> +}
Can you use romfile_loadint() instead? Something like:
u64 feature_control_bits = romfile_loadint("etc/msr_feature_control", 0);
if (feature_control_bits)
wrmsr_smp(MSR_IA32_FEATURE_CONTROL, feature_control_bits);
That should avoid the need for the separate romfile_find() call and it
has the added benefit of additional sanity checks.
Also, I think this code is small enough it can be placed directly in
paravirt.c and does not need its own c file.
-Kevin
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [SeaBIOS] [PATCH v2] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL
2016-06-17 15:26 ` [Qemu-devel] [SeaBIOS] " Kevin O'Connor
@ 2016-06-20 1:06 ` Haozhong Zhang
0 siblings, 0 replies; 4+ messages in thread
From: Haozhong Zhang @ 2016-06-20 1:06 UTC (permalink / raw)
To: Kevin O'Connor; +Cc: seabios, Paolo Bonzini, qemu-devel
On 06/17/16 11:26, Kevin O'Connor wrote:
> On Fri, Jun 17, 2016 at 03:20:10PM +0800, Haozhong Zhang wrote:
> > OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
> > for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
> > "etc/msr_feature_control" to advise bits that should be set in
> > MSR_IA32_FEATURE_CONTROL. If this file exists, SeaBIOS will set the
> > advised bits in that MSR.
>
> Thanks - see my comments below.
>
> > --- /dev/null
> > +++ b/src/fw/msr_feature_control.c
> > @@ -0,0 +1,16 @@
> > +#include "util.h" // msr_feature_control_setup, wrmsr_smp
> > +#include "romfile.h" // romfile_find
> > +
> > +#define MSR_IA32_FEATURE_CONTROL 0x0000003a
> > +
> > +void msr_feature_control_setup(void)
> > +{
> > + struct romfile_s *f = romfile_find("etc/msr_feature_control");
> > + if (!f)
> > + return;
> > +
> > + u64 feature_control_bits;
> > + f->copy(f, &feature_control_bits, sizeof(feature_control_bits));
> > + if (feature_control_bits)
> > + wrmsr_smp(MSR_IA32_FEATURE_CONTROL, feature_control_bits);
> > +}
>
> Can you use romfile_loadint() instead? Something like:
>
> u64 feature_control_bits = romfile_loadint("etc/msr_feature_control", 0);
> if (feature_control_bits)
> wrmsr_smp(MSR_IA32_FEATURE_CONTROL, feature_control_bits);
>
> That should avoid the need for the separate romfile_find() call and it
> has the added benefit of additional sanity checks.
>
> Also, I think this code is small enough it can be placed directly in
> paravirt.c and does not need its own c file.
>
I'll use romfile_loadint and place the code in paravirt.c in the next version.
Thanks,
Haozhong
^ permalink raw reply [flat|nested] 4+ messages in thread
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2016-06-17 7:20 [Qemu-devel] [PATCH v2] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL Haozhong Zhang
2016-06-17 7:29 ` Paolo Bonzini
2016-06-17 15:26 ` [Qemu-devel] [SeaBIOS] " Kevin O'Connor
2016-06-20 1:06 ` Haozhong Zhang
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