From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46306) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bE7Vf-0003cI-5I for qemu-devel@nongnu.org; Sat, 18 Jun 2016 00:05:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bE7Vd-0005KZ-T6 for qemu-devel@nongnu.org; Sat, 18 Jun 2016 00:05:26 -0400 Received: from mail-yw0-x241.google.com ([2607:f8b0:4002:c05::241]:33229) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bE7Vd-0005KS-M0 for qemu-devel@nongnu.org; Sat, 18 Jun 2016 00:05:25 -0400 Received: by mail-yw0-x241.google.com with SMTP id d137so4907556ywe.0 for ; Fri, 17 Jun 2016 21:05:25 -0700 (PDT) From: Pranith Kumar Date: Sat, 18 Jun 2016 00:03:34 -0400 Message-Id: <20160618040343.19517-6-bobby.prani@gmail.com> In-Reply-To: <20160618040343.19517-1-bobby.prani@gmail.com> References: <20160618040343.19517-1-bobby.prani@gmail.com> Subject: [Qemu-devel] [RFC v3 PATCH 05/14] tcg/ia64: Add support for fence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno , Richard Henderson , "open list:All patches CC here" Cc: alex.bennee@linaro.org, serge.fdrv@gmail.com Cc: Aurelien Jarno Signed-off-by: Richard Henderson Signed-off-by: Pranith Kumar --- tcg/ia64/tcg-target.inc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tcg/ia64/tcg-target.inc.c b/tcg/ia64/tcg-target.inc.c index 395223e..7b220a7 100644 --- a/tcg/ia64/tcg-target.inc.c +++ b/tcg/ia64/tcg-target.inc.c @@ -247,6 +247,7 @@ enum { OPC_LD4_M3 = 0x0a080000000ull, OPC_LD8_M1 = 0x080c0000000ull, OPC_LD8_M3 = 0x0a0c0000000ull, + OPC_MF_M24 = 0x00110000000ull, OPC_MUX1_I3 = 0x0eca0000000ull, OPC_NOP_B9 = 0x04008000000ull, OPC_NOP_F16 = 0x00008000000ull, @@ -2213,6 +2214,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_qemu_st(s, args); break; + case INDEX_op_mb: + tcg_out_bundle(s, mmI, OPC_MF_M24, INSN_NOP_M, INSN_NOP_I); + break; case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_mov_i64: case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ @@ -2326,6 +2330,7 @@ static const TCGTargetOpDef ia64_op_defs[] = { { INDEX_op_qemu_st_i32, { "SZ", "r" } }, { INDEX_op_qemu_st_i64, { "SZ", "r" } }, + { INDEX_op_mb, { } }, { -1 }, }; -- 2.9.0