From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55782) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bEoiZ-0001jE-Bd for qemu-devel@nongnu.org; Sun, 19 Jun 2016 22:13:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bEoiW-0004Og-Uq for qemu-devel@nongnu.org; Sun, 19 Jun 2016 22:13:38 -0400 Date: Mon, 20 Jun 2016 12:15:15 +1000 From: "david@gibson.dropbear.id.au" Message-ID: <20160620021515.GE6858@voom.fritz.box> References: <201606172208.u5HM8Evh019067@linux02.ddci.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="//IivP0gvsAy3Can" Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH] target-ppc: Correct ppc3500_spin initial TLB size List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Scott Wood Cc: Aaron Larson , "agraf@suse.de" , "qemu-devel@nongnu.org" , "qemu-ppc@nongnu.org" --//IivP0gvsAy3Can Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jun 17, 2016 at 10:55:47PM +0000, Scott Wood wrote: > On 06/17/2016 05:13 PM, Aaron Larson wrote: > > When e500 PPC is booted multi-core, the non-boot cores are started via > > the spin table. ppce500_spin.c:spin_kick() calls > > mmubooke_create_initial_mapping() to allocate a 64MB TLB entry, but > > the created TLB entry is only 256KB. > >=20 > > The root cause is that the function computing the size of the TLB > > entry, namely booke206_page_size_to_tlb assumes MAS1.TSIZE as defined > > by latter PPC cores, specifically (n**4)KB. The result is then used by > > mmubooke_create_initial_mapping using MAS1_TSIZE_SHIFT, but > > MAS1_TSIZE_SHIFT is defined assuming TLB entries are (n**2)KB. I.e., a > > difference of shift=3D7 or shift=3D8. > >=20 > > Simply changing MAS1_TSIZE_SHIFT from 7 to 8 is not appropriate since > > the macro is used elsewhere. > >=20 > > Signed-off-by: Aaron Larson > > --- > > hw/ppc/ppce500_spin.c | 6 +++++- > > 1 file changed, 5 insertions(+), 1 deletion(-) > >=20 > > diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c > > index 76bd78b..7e38f0c 100644 > > --- a/hw/ppc/ppce500_spin.c > > +++ b/hw/ppc/ppce500_spin.c > > @@ -75,7 +75,11 @@ static void spin_reset(void *opaque) > > /* Create -kernel TLB entries for BookE, linearly spanning 256MB. */ > > static inline hwaddr booke206_page_size_to_tlb(uint64_t size) > > { > > - return ctz32(size >> 10) >> 1; > > + /* The EREF indicates that TLB pages are (4 to the power of 2)KB, = which > > + * corresponds to MAS1_TSIZE_SHIFT=3D8, but to support legacy proc= essors that > > + * assume TLB pages are (2 to the power of 2)KB MAS1_TSIZE_SHIFT is > > + * currently 7. */ >=20 > This is backwards. It's the old processors that can only handle > power-of-4 sizes. To clarify, is this a problem in the code, or just in the comment? > > + return ctz32(size >> 10) >> (MAS1_TSIZE_SHIFT - 7); >=20 > The patch that changed MAS1_TSIZE_SHIFT from 8 to 7 was around the same > time as the patch that added this code, which is probably why adjusting > it got missed. Commit 2bd9543cd3 did update the equivalent code in > ppce500_mpc8544ds.c, which now resides in hw/ppc/e500.c and has been > changed to not assume a power-of-2 size. The ppce500_spin version > should be eliminated. Sounds sensible. Aaron, for some reason I got multiple copies of your patch mail - a couple of full ones and then a couple more extras which had 0 size. Was that just something going wrong with your mailer, or did you attempt to send a couple of different versions? --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --//IivP0gvsAy3Can Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJXZ1GzAAoJEGw4ysog2bOSUQUP/Rd665soXThya7jdslCXOsZp 64DEuiLU1A377wsbqp4+lFS0AGbzaxiO8In7Hy9bs/ryg2lZbRrpbzXkccypgVd6 rhSg0Vwdpq6UcHz83WrLjUWf2UCKyMbnuUV5OxcaGjtmmCKRkeRsAYGVjMvAebDm 0OE4tmYm09uVmtPwQgw+pMP+bd6Nt3Xt4+xARM9EKFizO8yxDksug5wvGhW39W0w qE0i3LvtfbSLWjlkj31NiIor9fLFuRKbr5Iha4vavhfnvZpX0gnCovE9rGM+wjJu B+KuiTAhmHKzjWe1nJxbsNzIDKQy1ehppr3y6M+JMkFsY06oqso0rBzhkhIqq+yT iebGU/2LiPhzIPlmP6D8GQG3Cmm2Shn42JXnJ+SnQVPuwY6CB2lrlskZHRFytLgk oSLfq6ViHw4iLM9/8+dG55v2Q+R8Xt3Qz1iSuVPki9Y4bEcyeNScRn7K2XhdgIGF P7NvF9AJMqXt9GyA95aQ+s3Zj3CNFPh5AqVlN3Vmkasdw4zAf63VBi0H/MTzSw8B iHH/OmicX+/oDGcQqkuKdRK0ncJdNoZPl/ytd4qcjEajXVY1qqCQvUEjVSkwGrHt IXySvHW6xf8teQBUt9GcQs75g9GW551NjHelCltOwN+3Dz6p9UoDv5CZgRTwSD6Y jJlGMYyjyp1E1VzArZib =LvCq -----END PGP SIGNATURE----- --//IivP0gvsAy3Can--