From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35551) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFqsb-00016I-AI for qemu-devel@nongnu.org; Wed, 22 Jun 2016 18:44:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bFqsX-0002uw-6O for qemu-devel@nongnu.org; Wed, 22 Jun 2016 18:44:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49104) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFqsX-0002uZ-0O for qemu-devel@nongnu.org; Wed, 22 Jun 2016 18:44:13 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CD79A63E08 for ; Wed, 22 Jun 2016 22:44:10 +0000 (UTC) Date: Thu, 23 Jun 2016 01:44:06 +0300 From: "Michael S. Tsirkin" Message-ID: <20160623014216-mutt-send-email-mst@redhat.com> References: <20160616202449.GY18662@thinpad.lan.raisama.net> <20160617081505.GA2273@work-vm> <20160617131815.GA18662@thinpad.lan.raisama.net> <20160617151900.GE18662@thinpad.lan.raisama.net> <20160617154905.GH18662@thinpad.lan.raisama.net> <20160621194440.GN17952@thinpad.lan.raisama.net> <9b76415a-23e6-3ded-4dbc-42838cc164b0@redhat.com> <20160622142414.GI30202@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160622142414.GI30202@redhat.com> Subject: Re: [Qemu-devel] Default for phys-addr-bits? (was Re: [PATCH 4/5] x86: Allow physical address bits to be set) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andrea Arcangeli Cc: Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , "Dr. David Alan Gilbert" , qemu-devel@nongnu.org On Wed, Jun 22, 2016 at 04:24:14PM +0200, Andrea Arcangeli wrote: > > cause malfunctioning, only crashes (and as Gerd said, if you cross your > > fingers and hope the guest doesn't put anything so high in memory, > > chances are you'll succeed), and this makes it "safer". I'm not sure > > which one is more likely to happen. > > But the crash with guest phys bits > host phys bits is material, linux > will definitely crash in such condition. Why would it? Most GPA addresses are not guest controllable. Don't give guest addresses that host can't access, you will not get a crash. The only exception I know of is PCI BARs but we can limit these to a safe addressable range using _CRS method in ACPI. Could you explain please? -- MST