From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47368) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bGJY4-0004TL-8B for qemu-devel@nongnu.org; Fri, 24 Jun 2016 01:21:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bGJXx-0006nx-TN for qemu-devel@nongnu.org; Fri, 24 Jun 2016 01:21:00 -0400 Date: Fri, 24 Jun 2016 15:17:09 +1000 From: David Gibson Message-ID: <20160624051709.GH15625@voom.fritz.box> References: <1466704050-15108-1-git-send-email-nikunj@linux.vnet.ibm.com> <1466704050-15108-2-git-send-email-nikunj@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="3ecMC0kzqsE2ddMN" Content-Disposition: inline In-Reply-To: <1466704050-15108-2-git-send-email-nikunj@linux.vnet.ibm.com> Subject: Re: [Qemu-devel] [PATCH v1 01/11] ppc/xics: Rename existing xics to xics_spapr List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nikunj A Dadhania Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, clg@kaod.org, Benjamin Herrenschmidt --3ecMC0kzqsE2ddMN Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Jun 23, 2016 at 11:17:20PM +0530, Nikunj A Dadhania wrote: > From: Benjamin Herrenschmidt >=20 > The common class doesn't change, the KVM one is sPAPR specific. Rename > variables and functions to xics_spapr. >=20 > Retain the type name as "xics" to preserve migration for existing sPAPR > guests. >=20 > Signed-off-by: Benjamin Herrenschmidt > Signed-off-by: Nikunj A Dadhania > --- > hw/intc/xics.c | 29 +++++++++++++++-------------- > hw/intc/xics_kvm.c | 6 +++--- > hw/ppc/spapr.c | 7 ++++--- > hw/ppc/spapr_events.c | 2 +- > hw/ppc/spapr_pci.c | 10 +++++----- > hw/ppc/spapr_vio.c | 2 +- > include/hw/ppc/xics.h | 29 +++++++++++++++++------------ > 7 files changed, 46 insertions(+), 39 deletions(-) >=20 > diff --git a/hw/intc/xics.c b/hw/intc/xics.c > index cce7f3d..a715532 100644 > --- a/hw/intc/xics.c > +++ b/hw/intc/xics.c > @@ -729,7 +729,8 @@ static int ics_find_free_block(ICSState *ics, int num= , int alignnum) > return -1; > } > =20 > -int xics_alloc(XICSState *icp, int src, int irq_hint, bool lsi, Error **= errp) > +int xics_spapr_alloc(XICSState *icp, int src, int irq_hint, bool lsi, > + Error **errp) > { > ICSState *ics =3D &icp->ics[src]; > int irq; > @@ -760,8 +761,8 @@ int xics_alloc(XICSState *icp, int src, int irq_hint,= bool lsi, Error **errp) > * Allocate block of consecutive IRQs, and return the number of the firs= t IRQ in the block. > * If align=3D=3Dtrue, aligns the first IRQ number to num. > */ > -int xics_alloc_block(XICSState *icp, int src, int num, bool lsi, bool al= ign, > - Error **errp) > +int xics_spapr_alloc_block(XICSState *icp, int src, int num, bool lsi, > + bool align, Error **errp) > { > int i, first =3D -1; > ICSState *ics =3D &icp->ics[src]; > @@ -810,7 +811,7 @@ static void ics_free(ICSState *ics, int srcno, int nu= m) > } > } > =20 > -void xics_free(XICSState *icp, int irq, int num) > +void xics_spapr_free(XICSState *icp, int irq, int num) > { > int src =3D xics_find_source(icp, irq); > =20 > @@ -1029,7 +1030,7 @@ static void xics_set_nr_servers(XICSState *icp, uin= t32_t nr_servers, > } > } > =20 > -static void xics_realize(DeviceState *dev, Error **errp) > +static void xics_spapr_realize(DeviceState *dev, Error **errp) > { > XICSState *icp =3D XICS(dev); > Error *error =3D NULL; > @@ -1068,7 +1069,7 @@ static void xics_realize(DeviceState *dev, Error **= errp) > } > } > =20 > -static void xics_initfn(Object *obj) > +static void xics_spapr_initfn(Object *obj) > { > XICSState *xics =3D XICS(obj); > =20 > @@ -1077,29 +1078,29 @@ static void xics_initfn(Object *obj) > xics->ics->icp =3D xics; > } > =20 > -static void xics_class_init(ObjectClass *oc, void *data) > +static void xics_spapr_class_init(ObjectClass *oc, void *data) > { > DeviceClass *dc =3D DEVICE_CLASS(oc); > - XICSStateClass *xsc =3D XICS_CLASS(oc); > + XICSStateClass *xsc =3D XICS_SPAPR_CLASS(oc); > =20 > - dc->realize =3D xics_realize; > + dc->realize =3D xics_spapr_realize; > xsc->set_nr_irqs =3D xics_set_nr_irqs; > xsc->set_nr_servers =3D xics_set_nr_servers; > } > =20 > -static const TypeInfo xics_info =3D { > - .name =3D TYPE_XICS, > +static const TypeInfo xics_spapr_info =3D { > + .name =3D TYPE_XICS_SPAPR, > .parent =3D TYPE_XICS_COMMON, > .instance_size =3D sizeof(XICSState), > .class_size =3D sizeof(XICSStateClass), > - .class_init =3D xics_class_init, > - .instance_init =3D xics_initfn, > + .class_init =3D xics_spapr_class_init, > + .instance_init =3D xics_spapr_initfn, > }; > =20 > static void xics_register_types(void) > { > type_register_static(&xics_common_info); > - type_register_static(&xics_info); > + type_register_static(&xics_spapr_info); > type_register_static(&ics_info); > type_register_static(&icp_info); > } > diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c > index b17d6a9..90d657e 100644 > --- a/hw/intc/xics_kvm.c > +++ b/hw/intc/xics_kvm.c > @@ -495,8 +495,8 @@ static void xics_kvm_class_init(ObjectClass *oc, void= *data) > xsc->set_nr_servers =3D xics_kvm_set_nr_servers; > } > =20 > -static const TypeInfo xics_kvm_info =3D { > - .name =3D TYPE_KVM_XICS, > +static const TypeInfo xics_spapr_kvm_info =3D { > + .name =3D TYPE_XICS_SPAPR_KVM, > .parent =3D TYPE_XICS_COMMON, > .instance_size =3D sizeof(KVMXICSState), > .class_init =3D xics_kvm_class_init, > @@ -505,7 +505,7 @@ static const TypeInfo xics_kvm_info =3D { > =20 > static void xics_kvm_register_types(void) > { > - type_register_static(&xics_kvm_info); > + type_register_static(&xics_spapr_kvm_info); > type_register_static(&ics_kvm_info); > type_register_static(&icp_kvm_info); > } > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > index 0b6bb9c..a8d497c 100644 > --- a/hw/ppc/spapr.c > +++ b/hw/ppc/spapr.c > @@ -122,7 +122,8 @@ static XICSState *xics_system_init(MachineState *mach= ine, > Error *err =3D NULL; > =20 > if (machine_kernel_irqchip_allowed(machine)) { > - icp =3D try_create_xics(TYPE_KVM_XICS, nr_servers, nr_irqs, = &err); > + icp =3D try_create_xics(TYPE_XICS_SPAPR_KVM, nr_servers, nr_= irqs, > + &err); > } > if (machine_kernel_irqchip_required(machine) && !icp) { > error_reportf_err(err, > @@ -133,7 +134,7 @@ static XICSState *xics_system_init(MachineState *mach= ine, > } > =20 > if (!icp) { > - icp =3D try_create_xics(TYPE_XICS, nr_servers, nr_irqs, errp); > + icp =3D try_create_xics(TYPE_XICS_SPAPR, nr_servers, nr_irqs, er= rp); > } > =20 > return icp; > @@ -1781,7 +1782,7 @@ static void ppc_spapr_init(MachineState *machine) > /* Set up Interrupt Controller before we create the VCPUs */ > spapr->icp =3D xics_system_init(machine, > DIV_ROUND_UP(max_cpus * smt, smp_threa= ds), > - XICS_IRQS, &error_fatal); > + XICS_IRQS_SPAPR, &error_fatal); > =20 > if (smc->dr_lmb_enabled) { > spapr_validate_node_memory(machine, &error_fatal); > diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c > index af80992..0585f8a 100644 > --- a/hw/ppc/spapr_events.c > +++ b/hw/ppc/spapr_events.c > @@ -603,7 +603,7 @@ out_no_events: > void spapr_events_init(sPAPRMachineState *spapr) > { > QTAILQ_INIT(&spapr->pending_events); > - spapr->check_exception_irq =3D xics_alloc(spapr->icp, 0, 0, false, > + spapr->check_exception_irq =3D xics_spapr_alloc(spapr->icp, 0, 0, fa= lse, > &error_fatal); > spapr->epow_notifier.notify =3D spapr_powerdown_req; > qemu_register_powerdown_notifier(&spapr->epow_notifier); > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > index 9f28fb3..451651d 100644 > --- a/hw/ppc/spapr_pci.c > +++ b/hw/ppc/spapr_pci.c > @@ -322,7 +322,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAP= RMachineState *spapr, > return; > } > =20 > - xics_free(spapr->icp, msi->first_irq, msi->num); > + xics_spapr_free(spapr->icp, msi->first_irq, msi->num); > if (msi_present(pdev)) { > spapr_msi_setmsg(pdev, 0, false, 0, 0); > } > @@ -360,7 +360,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAP= RMachineState *spapr, > } > =20 > /* Allocate MSIs */ > - irq =3D xics_alloc_block(spapr->icp, 0, req_num, false, > + irq =3D xics_spapr_alloc_block(spapr->icp, 0, req_num, false, > ret_intr_type =3D=3D RTAS_TYPE_MSI, &err); > if (err) { > error_reportf_err(err, "Can't allocate MSIs for device %x: ", > @@ -371,7 +371,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAP= RMachineState *spapr, > =20 > /* Release previous MSIs */ > if (msi) { > - xics_free(spapr->icp, msi->first_irq, msi->num); > + xics_spapr_free(spapr->icp, msi->first_irq, msi->num); > g_hash_table_remove(phb->msi, &config_addr); > } > =20 > @@ -1442,7 +1442,7 @@ static void spapr_phb_realize(DeviceState *dev, Err= or **errp) > uint32_t irq; > Error *local_err =3D NULL; > =20 > - irq =3D xics_alloc_block(spapr->icp, 0, 1, true, false, &local_e= rr); > + irq =3D xics_spapr_alloc_block(spapr->icp, 0, 1, true, false, &l= ocal_err); > if (local_err) { > error_propagate(errp, local_err); > error_prepend(errp, "can't allocate LSIs: "); > @@ -1801,7 +1801,7 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, > _FDT(fdt_setprop(fdt, bus_off, "ranges", &ranges, sizeof_ranges)); > _FDT(fdt_setprop(fdt, bus_off, "reg", &bus_reg, sizeof(bus_reg))); > _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pci-config-space-type", 0x1= )); > - _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pe-total-#msi", XICS_IRQS)); > + _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pe-total-#msi", XICS_IRQS_S= PAPR)); > =20 > /* Build the interrupt-map, this must matches what is done > * in pci_spapr_map_irq > diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c > index ae40db8..7ffd23e 100644 > --- a/hw/ppc/spapr_vio.c > +++ b/hw/ppc/spapr_vio.c > @@ -463,7 +463,7 @@ static void spapr_vio_busdev_realize(DeviceState *qde= v, Error **errp) > dev->qdev.id =3D id; > } > =20 > - dev->irq =3D xics_alloc(spapr->icp, 0, dev->irq, false, &local_err); > + dev->irq =3D xics_spapr_alloc(spapr->icp, 0, dev->irq, false, &local= _err); > if (local_err) { > error_propagate(errp, local_err); > return; > diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h > index 9091054..452a978 100644 > --- a/include/hw/ppc/xics.h > +++ b/include/hw/ppc/xics.h > @@ -32,20 +32,24 @@ > #define TYPE_XICS_COMMON "xics-common" > #define XICS_COMMON(obj) OBJECT_CHECK(XICSState, (obj), TYPE_XICS_COMMON) > =20 > -#define TYPE_XICS "xics" > -#define XICS(obj) OBJECT_CHECK(XICSState, (obj), TYPE_XICS) > +/* > + * Retain xics as the type name to be compatible for migration. Rest all= the > + * functions, class and variables are renamed as xics_spapr. > + */ > +#define TYPE_XICS_SPAPR "xics" > +#define XICS(obj) OBJECT_CHECK(XICSState, (obj), TYPE_XICS_SPAPR) This should change to XICS_SPAPR to match the TYPE macro. > =20 > -#define TYPE_KVM_XICS "xics-kvm" > -#define KVM_XICS(obj) OBJECT_CHECK(KVMXICSState, (obj), TYPE_KVM_XICS) > +#define TYPE_XICS_SPAPR_KVM "xics-spapr-kvm" > +#define KVM_XICS(obj) OBJECT_CHECK(KVMXICSState, (obj), TYPE_XICS_SPAPR_= KVM) Likewise XICS_SPAPR_KVM(). > #define XICS_COMMON_CLASS(klass) \ > OBJECT_CLASS_CHECK(XICSStateClass, (klass), TYPE_XICS_COMMON) > -#define XICS_CLASS(klass) \ > - OBJECT_CLASS_CHECK(XICSStateClass, (klass), TYPE_XICS) > +#define XICS_SPAPR_CLASS(klass) \ > + OBJECT_CLASS_CHECK(XICSStateClass, (klass), TYPE_XICS_SPAPR) > #define XICS_COMMON_GET_CLASS(obj) \ > OBJECT_GET_CLASS(XICSStateClass, (obj), TYPE_XICS_COMMON) > -#define XICS_GET_CLASS(obj) \ > - OBJECT_GET_CLASS(XICSStateClass, (obj), TYPE_XICS) > +#define XICS_SPAPR_GET_CLASS(obj) \ > + OBJECT_GET_CLASS(XICSStateClass, (obj), TYPE_XICS_SPAPR) > =20 > #define XICS_IPI 0x2 > #define XICS_BUID 0x1 > @@ -157,14 +161,15 @@ struct ICSIRQState { > uint8_t flags; > }; > =20 > -#define XICS_IRQS 1024 > +#define XICS_IRQS_SPAPR 1024 > =20 > qemu_irq xics_get_qirq(XICSState *icp, int irq); > void xics_set_irq_type(XICSState *icp, int irq, bool lsi); > -int xics_alloc(XICSState *icp, int src, int irq_hint, bool lsi, Error **= errp); > -int xics_alloc_block(XICSState *icp, int src, int num, bool lsi, bool al= ign, > +int xics_spapr_alloc(XICSState *icp, int src, int irq_hint, bool lsi, > Error **errp); > -void xics_free(XICSState *icp, int irq, int num); > +int xics_spapr_alloc_block(XICSState *icp, int src, int num, bool lsi, > + bool align, Error **errp); > +void xics_spapr_free(XICSState *icp, int irq, int num); > =20 > void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu); > void xics_cpu_destroy(XICSState *icp, PowerPCCPU *cpu); --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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