From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34362) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHjC5-0006ED-TH for qemu-devel@nongnu.org; Mon, 27 Jun 2016 22:56:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bHjC3-0005Hs-LQ for qemu-devel@nongnu.org; Mon, 27 Jun 2016 22:56:08 -0400 Date: Tue, 28 Jun 2016 12:57:41 +1000 From: David Gibson Message-ID: <20160628025741.GU4242@voom.fritz.box> References: <1467041915-19784-1-git-send-email-marcel@redhat.com> <1467041915-19784-6-git-send-email-marcel@redhat.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="f6M9UaX53EEZorp0" Content-Disposition: inline In-Reply-To: <1467041915-19784-6-git-send-email-marcel@redhat.com> Subject: Re: [Qemu-devel] [PATCH V5 5/5] machine: remove iommu property List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Marcel Apfelbaum Cc: qemu-devel@nongnu.org, ehabkost@redhat.com, pbonzini@redhat.com, mst@redhat.com, davidkiarie4@gmail.com, peterx@redhat.com, bd.aviv@gmail.com, jan.kiszka@web.de, agraf@suse.de, qemu-ppc@nongnu.org, armbru@redhat.com --f6M9UaX53EEZorp0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jun 27, 2016 at 06:38:35PM +0300, Marcel Apfelbaum wrote: > Since iommu devices can be created with '-device' there is > no need to keep iommu as machine and mch property. Doesn't this break backwards compatibility? >=20 > Signed-off-by: Marcel Apfelbaum > --- > hw/core/machine.c | 20 -------------------- > hw/pci-host/q35.c | 12 ------------ > include/hw/pci-host/q35.h | 1 - > qemu-options.hx | 3 --- > 4 files changed, 36 deletions(-) >=20 > diff --git a/hw/core/machine.c b/hw/core/machine.c > index ccdd5fa..8f94301 100644 > --- a/hw/core/machine.c > +++ b/hw/core/machine.c > @@ -300,20 +300,6 @@ static void machine_set_firmware(Object *obj, const = char *value, Error **errp) > ms->firmware =3D g_strdup(value); > } > =20 > -static bool machine_get_iommu(Object *obj, Error **errp) > -{ > - MachineState *ms =3D MACHINE(obj); > - > - return ms->iommu; > -} > - > -static void machine_set_iommu(Object *obj, bool value, Error **errp) > -{ > - MachineState *ms =3D MACHINE(obj); > - > - ms->iommu =3D value; > -} > - > static void machine_set_suppress_vmdesc(Object *obj, bool value, Error *= *errp) > { > MachineState *ms =3D MACHINE(obj); > @@ -493,12 +479,6 @@ static void machine_initfn(Object *obj) > object_property_set_description(obj, "firmware", > "Firmware image", > NULL); > - object_property_add_bool(obj, "iommu", > - machine_get_iommu, > - machine_set_iommu, NULL); > - object_property_set_description(obj, "iommu", > - "Set on/off to enable/disable Intel = IOMMU (VT-d)", > - NULL); > object_property_add_bool(obj, "suppress-vmdesc", > machine_get_suppress_vmdesc, > machine_set_suppress_vmdesc, NULL); > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c > index 4bd5fb5..181bc3b 100644 > --- a/hw/pci-host/q35.c > +++ b/hw/pci-host/q35.c > @@ -427,14 +427,6 @@ static void mch_reset(DeviceState *qdev) > mch_update(mch); > } > =20 > -static void mch_init_dmar(MCHPCIState *mch) > -{ > - mch->iommu =3D INTEL_IOMMU_DEVICE(qdev_create(NULL, TYPE_INTEL_IOMMU= _DEVICE)); > - object_property_add_child(OBJECT(mch), "intel-iommu", > - OBJECT(mch->iommu), NULL); > - qdev_init_nofail(DEVICE(mch->iommu)); > -} > - > static void mch_realize(PCIDevice *d, Error **errp) > { > int i; > @@ -493,10 +485,6 @@ static void mch_realize(PCIDevice *d, Error **errp) > mch->pci_address_space, &mch->pam_regions[i+1], > PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); > } > - /* Intel IOMMU (VT-d) */ > - if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) { > - mch_init_dmar(mch); > - } > } > =20 > uint64_t mch_mcfg_base(void) > diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h > index c5c073d..3dee058 100644 > --- a/include/hw/pci-host/q35.h > +++ b/include/hw/pci-host/q35.h > @@ -60,7 +60,6 @@ typedef struct MCHPCIState { > ram_addr_t above_4g_mem_size; > uint64_t pci_hole64_size; > uint32_t short_root_bus; > - IntelIOMMUState *iommu; > } MCHPCIState; > =20 > typedef struct Q35PCIHost { > diff --git a/qemu-options.hx b/qemu-options.hx > index 44c658f..1d3c02e 100644 > --- a/qemu-options.hx > +++ b/qemu-options.hx > @@ -38,7 +38,6 @@ DEF("machine", HAS_ARG, QEMU_OPTION_machine, \ > " kvm_shadow_mem=3Dsize of KVM shadow MMU in bytes\n" > " dump-guest-core=3Don|off include guest memory in a = core dump (default=3Don)\n" > " mem-merge=3Don|off controls memory merge support (d= efault: on)\n" > - " iommu=3Don|off controls emulated Intel IOMMU (VT-d)= support (default=3Doff)\n" > " igd-passthru=3Don|off controls IGD GFX passthrough = support (default=3Doff)\n" > " aes-key-wrap=3Don|off controls support for AES key = wrapping (default=3Don)\n" > " dea-key-wrap=3Don|off controls support for DEA key = wrapping (default=3Don)\n" > @@ -73,8 +72,6 @@ Include guest memory in a core dump. The default is on. > Enables or disables memory merge support. This feature, when supported by > the host, de-duplicates identical memory pages among VMs instances > (enabled by default). > -@item iommu=3Don|off > -Enables or disables emulated Intel IOMMU (VT-d) support. The default is = off. > @item aes-key-wrap=3Don|off > Enables or disables AES key wrapping support on s390-ccw hosts. This fea= ture > controls whether AES wrapping keys will be created to allow --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --f6M9UaX53EEZorp0 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJXceekAAoJEGw4ysog2bOSK5AQAIv3UEDW+48L1mrd7B3Fv53D 8wv99uyllkYYDWuDhEFZwUme8gEzhICvdkQvHvZldkgt2571YLt/BYin96FiXk2h exGAPS6U/Rj6eRtXtaTi1fZPOuTNAJJ1VeAA7zs8v6VNR1bTEv0wnITcUFfXqD+G AqWfF9pFIaLR5i0s7Y8Ykl8h/26fd49gAB+nRESIEkHqV/hvz0IM7Tr6IjYz6NW5 XwAsMgBLKrB17jo4TwaWmyrRuCHAfA7eK4C0z5KlRPcWntvaOBQ1PSgLCoEX+qXw B673qZGYFZ9fuYqTVKeDFYQvtjlmBZZGc7aBKwmWMNXrO1yXetnTgzJJEy5H7hGE jrVkbiyQQm7QDvyGUjU6hGQlV3J2wpU8iFwewIMIMaD6NiJgZEuc7LeiaWf0buRW qk79hE6wEM20owFUAuYzDB1J7/7bDvYXjd3PXVFVUomnHOXctRXkDvJXIA3oazcJ 3HOY1gRS+YERl9J9w7L0u1MPEwQp7M39QqhfiWuBIZ0tsPs5jBumJ234WKLoxx6N JYYQ2sGaQZMV19saV2qXCV+8Rhz4ysmaByaER7obv1x/ktDn1SxtKoFzJnQTnN/u JT4VhR6+P9yYu+C/85y+m25zrEJkp6oCTKy26efteKxw4Xlw1aPfDkO+xDTvpPUb UJWn7zxmndtbmObhIy4d =nlQE -----END PGP SIGNATURE----- --f6M9UaX53EEZorp0--