From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48076) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bI5Q4-0005HN-4F for qemu-devel@nongnu.org; Tue, 28 Jun 2016 22:40:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bI5Q1-0004Cf-0o for qemu-devel@nongnu.org; Tue, 28 Jun 2016 22:40:03 -0400 Date: Wed, 29 Jun 2016 12:22:22 +1000 From: David Gibson Message-ID: <20160629022221.GE8885@voom.fritz.box> References: <1467096514-18905-1-git-send-email-clg@kaod.org> <1467096514-18905-3-git-send-email-clg@kaod.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="k3qmt+ucFURmlhDS" Content-Disposition: inline In-Reply-To: <1467096514-18905-3-git-send-email-clg@kaod.org> Subject: Re: [Qemu-devel] [PATCH 2/2] ppc: Fix 64K pages support in full emulation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-1?Q?C=E9dric?= Le Goater Cc: Benjamin Herrenschmidt , qemu-devel@nongnu.org, qemu-ppc@nongnu.org --k3qmt+ucFURmlhDS Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Jun 28, 2016 at 08:48:34AM +0200, C=E9dric Le Goater wrote: > From: Benjamin Herrenschmidt >=20 > We were always advertising only 4K & 16M. Additionally the code wasn't > properly matching the page size with the PTE content, which meant we > could potentially hit an incorrect PTE if the guest used multiple sizes. >=20 > Finally, honor the CPU capabilities when decoding the size from the SLB > so we don't try to use 64K pages on 970. >=20 > This still doesn't add support for MPSS (Multiple Page Sizes per Segment) >=20 > Signed-off-by: Benjamin Herrenschmidt > [clg: fixed checkpatch.pl errors > commits 61a36c9b5a12 and 1114e712c998 reworked the hpte code > doing insertion/removal in hw/ppc/spapr_hcall.c. The hunks > modifying these areas were removed. ] > Signed-off-by: C=E9dric Le Goater Applied to ppc-for-2.7. > --- > target-ppc/cpu-qom.h | 3 +++ > target-ppc/mmu-hash64.c | 39 +++++++++++++++++++++++++++++++++++---- > target-ppc/translate_init.c | 22 +++++++++++++++++++--- > 3 files changed, 57 insertions(+), 7 deletions(-) >=20 > diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h > index 0fad2def0a94..286410502f6d 100644 > --- a/target-ppc/cpu-qom.h > +++ b/target-ppc/cpu-qom.h > @@ -70,18 +70,21 @@ enum powerpc_mmu_t { > #define POWERPC_MMU_64 0x00010000 > #define POWERPC_MMU_1TSEG 0x00020000 > #define POWERPC_MMU_AMR 0x00040000 > +#define POWERPC_MMU_64K 0x00080000 > /* 64 bits PowerPC MMU */ > POWERPC_MMU_64B =3D POWERPC_MMU_64 | 0x00000001, > /* Architecture 2.03 and later (has LPCR) */ > POWERPC_MMU_2_03 =3D POWERPC_MMU_64 | 0x00000002, > /* Architecture 2.06 variant */ > POWERPC_MMU_2_06 =3D POWERPC_MMU_64 | POWERPC_MMU_1TSEG > + | POWERPC_MMU_64K > | POWERPC_MMU_AMR | 0x00000003, > /* Architecture 2.06 "degraded" (no 1T segments) */ > POWERPC_MMU_2_06a =3D POWERPC_MMU_64 | POWERPC_MMU_AMR > | 0x00000003, > /* Architecture 2.07 variant */ > POWERPC_MMU_2_07 =3D POWERPC_MMU_64 | POWERPC_MMU_1TSEG > + | POWERPC_MMU_64K > | POWERPC_MMU_AMR | 0x00000004, > /* Architecture 2.07 "degraded" (no 1T segments) */ > POWERPC_MMU_2_07a =3D POWERPC_MMU_64 | POWERPC_MMU_AMR > diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c > index ed353b2d1539..fa26ad2e875b 100644 > --- a/target-ppc/mmu-hash64.c > +++ b/target-ppc/mmu-hash64.c > @@ -450,9 +450,31 @@ void ppc_hash64_stop_access(PowerPCCPU *cpu, uint64_= t token) > } > } > =20 > +/* Returns the effective page shift or 0. MPSS isn't supported yet so > + * this will always be the slb_pshift or 0 > + */ > +static uint32_t ppc_hash64_pte_size_decode(uint64_t pte1, uint32_t slb_p= shift) > +{ > + switch (slb_pshift) { > + case 12: > + return 12; > + case 16: > + if ((pte1 & 0xf000) =3D=3D 0x1000) { > + return 16; > + } > + return 0; > + case 24: > + if ((pte1 & 0xff000) =3D=3D 0) { > + return 24; > + } > + return 0; > + } > + return 0; > +} > + > static hwaddr ppc_hash64_pteg_search(PowerPCCPU *cpu, hwaddr hash, > - bool secondary, target_ulong ptem, > - ppc_hash_pte64_t *pte) > + uint32_t slb_pshift, bool secondary, > + target_ulong ptem, ppc_hash_pte64_t= *pte) > { > CPUPPCState *env =3D &cpu->env; > int i; > @@ -472,6 +494,13 @@ static hwaddr ppc_hash64_pteg_search(PowerPCCPU *cpu= , hwaddr hash, > if ((pte0 & HPTE64_V_VALID) > && (secondary =3D=3D !!(pte0 & HPTE64_V_SECONDARY)) > && HPTE64_V_COMPARE(pte0, ptem)) { > + uint32_t pshift =3D ppc_hash64_pte_size_decode(pte1, slb_psh= ift); > + if (pshift =3D=3D 0) { > + continue; > + } > + /* We don't do anything with pshift yet as qemu TLB only dea= ls > + * with 4K pages anyway > + */ > pte->pte0 =3D pte0; > pte->pte1 =3D pte1; > ppc_hash64_stop_access(cpu, token); > @@ -525,7 +554,8 @@ static hwaddr ppc_hash64_htab_lookup(PowerPCCPU *cpu, > " vsid=3D" TARGET_FMT_lx " ptem=3D" TARGET_FMT_lx > " hash=3D" TARGET_FMT_plx "\n", > env->htab_base, env->htab_mask, vsid, ptem, hash); > - pte_offset =3D ppc_hash64_pteg_search(cpu, hash, 0, ptem, pte); > + pte_offset =3D ppc_hash64_pteg_search(cpu, hash, slb->sps->page_shif= t, > + 0, ptem, pte); > =20 > if (pte_offset =3D=3D -1) { > /* Secondary PTEG lookup */ > @@ -535,7 +565,8 @@ static hwaddr ppc_hash64_htab_lookup(PowerPCCPU *cpu, > " hash=3D" TARGET_FMT_plx "\n", env->htab_base, > env->htab_mask, vsid, ptem, ~hash); > =20 > - pte_offset =3D ppc_hash64_pteg_search(cpu, ~hash, 1, ptem, pte); > + pte_offset =3D ppc_hash64_pteg_search(cpu, ~hash, slb->sps->page= _shift, 1, > + ptem, pte); > } > =20 > return pte_offset; > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index 4820c0bc99fb..d7860fd7f8ee 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -10301,8 +10301,8 @@ static void ppc_cpu_initfn(Object *obj) > if (pcc->sps) { > env->sps =3D *pcc->sps; > } else if (env->mmu_model & POWERPC_MMU_64) { > - /* Use default sets of page sizes */ > - static const struct ppc_segment_page_sizes defsps =3D { > + /* Use default sets of page sizes. We don't support MPSS */ > + static const struct ppc_segment_page_sizes defsps_4k =3D { > .sps =3D { > { .page_shift =3D 12, /* 4K */ > .slb_enc =3D 0, > @@ -10314,7 +10314,23 @@ static void ppc_cpu_initfn(Object *obj) > }, > }, > }; > - env->sps =3D defsps; > + static const struct ppc_segment_page_sizes defsps_64k =3D { > + .sps =3D { > + { .page_shift =3D 12, /* 4K */ > + .slb_enc =3D 0, > + .enc =3D { { .page_shift =3D 12, .pte_enc =3D 0 } } > + }, > + { .page_shift =3D 16, /* 64K */ > + .slb_enc =3D 0x110, > + .enc =3D { { .page_shift =3D 16, .pte_enc =3D 1 } } > + }, > + { .page_shift =3D 24, /* 16M */ > + .slb_enc =3D 0x100, > + .enc =3D { { .page_shift =3D 24, .pte_enc =3D 0 } } > + }, > + }, > + }; > + env->sps =3D (env->mmu_model & POWERPC_MMU_64K) ? defsps_64k : d= efsps_4k; > } > #endif /* defined(TARGET_PPC64) */ > =20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --k3qmt+ucFURmlhDS Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJXczDdAAoJEGw4ysog2bOSLp8P/1o0YQ4pA3I6/wtX9i2i3D7I WES0gIZmS89bUTz5AbmVwR0oyZL0IeGIMc4AVf9mgMXh+hdMb0Syl2NiWBgvPT7O 1iHlAF22GmkrXlMEoEtG1K/kzFfgKsCobquWMvE6T1EUMaweRgqbgT6ZRoVCTlnv JWZ9bbOVgWGmpsgW6IFSTGo+wFbH4lyk666KJ/iZj1WEV32k6QmD1zZl4B15GE0c Jw2BsPIzby6vR3QCWPBD4oipRVaLtusC5itIWOUDFGkY7yhuTW2zHrSUUlEfblTc EdmnXi3aTf0Z5KwyKv5+LK02VUy+b55WRRD2b2zu8pXqriXbnKmapnj0O4sAerhX uQOCkGXAgtb/zBvh+EiD314lyoybkJ8eXbPrBaMKKC+lANaoTYXVuJ4Zilxy+G5v pFvCRPlJe30uTfXPGmriHWI5i5pkpnncmaeevtyZKCoAOs7+f1u3+DGyssA2QWA2 ZtDyql3piRZgzVNvSj3QYEj54zOGxDGIV+4KwuuLWD80mtDV4SnrUUlELezgz6VJ 9Z0DilBO2DzgmVAR64hHGUMfaiVFzPuyo5eIO1TcxDuzbfGR6eLPUMyYjsdGH/9Y njsuq+Hqyknr1AIlWvdhASoX8IaXL5SCxsqyxFhth4RhVn8xgdVsURY/CK2HPw/5 bL9LkEkbJAsxNzJud5vp =AgJs -----END PGP SIGNATURE----- --k3qmt+ucFURmlhDS--