From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:37201)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <ehabkost@redhat.com>) id 1bLCjZ-0000hk-2f
	for qemu-devel@nongnu.org; Thu, 07 Jul 2016 13:05:10 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <ehabkost@redhat.com>) id 1bLCjT-0008Ec-Ur
	for qemu-devel@nongnu.org; Thu, 07 Jul 2016 13:05:04 -0400
Received: from mx1.redhat.com ([209.132.183.28]:36297)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <ehabkost@redhat.com>) id 1bLCjT-0008EW-PB
	for qemu-devel@nongnu.org; Thu, 07 Jul 2016 13:04:59 -0400
Date: Thu, 7 Jul 2016 14:04:55 -0300
From: Eduardo Habkost <ehabkost@redhat.com>
Message-ID: <20160707170455.GA25492@thinpad.lan.raisama.net>
References: <20160622065624.25291-1-haozhong.zhang@intel.com>
	<20160622065624.25291-2-haozhong.zhang@intel.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20160622065624.25291-2-haozhong.zhang@intel.com>
Subject: Re: [Qemu-devel] [PATCH v5 1/4] target-i386: KVM: add basic Intel
 LMCE support
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Haozhong Zhang <haozhong.zhang@intel.com>
Cc: qemu-devel@nongnu.org, Tony Luck <tony.luck@intel.com>, rkrcmar@redhat.com, kvm@vger.kernel.org, "Michael S . Tsirkin" <mst@redhat.com>, Marcelo Tosatti <mtosatti@redhat.com>, Andi Kleen <andi.kleen@intel.com>, Paolo Bonzini <pbonzini@redhat.com>, Ashok Raj <ashok.raj@intel.com>, Boris Petkov <bp@suse.de>, Richard Henderson <rth@twiddle.net>

On Wed, Jun 22, 2016 at 02:56:21PM +0800, Haozhong Zhang wrote:
> From: Ashok Raj <ashok.raj@intel.com>
> 
> This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> are injected to only one VCPU rather than broadcast to all VCPUs. As KVM
> reports LMCE support on Intel platforms, this features is only available
> on Intel platforms.
> 
> LMCE is disabled by default and can be enabled/disabled by cpu option
> 'lmce=on/off'.
> 
> Signed-off-by: Ashok Raj <ashok.raj@intel.com>
> [Haozhong: Enable LMCE only on Intel platforms
>            Disable LMCE by default and add a cpu option 'lmce'
>            Handle the error if LMCE is enabled w/o host support
>            Remove MCG_LMCE_P from MCE_CAP_DEF
>            Add migration support for LMCE
>            Minor code style changes]
> Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>

Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>

Applied to x86-next. Thanks.

-- 
Eduardo