From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35463) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bRruj-0005ZL-A4 for qemu-devel@nongnu.org; Mon, 25 Jul 2016 22:16:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bRrue-0007aV-8i for qemu-devel@nongnu.org; Mon, 25 Jul 2016 22:16:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50454) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bRrue-0007Zw-2h for qemu-devel@nongnu.org; Mon, 25 Jul 2016 22:16:04 -0400 Date: Tue, 26 Jul 2016 05:15:58 +0300 From: "Michael S. Tsirkin" Message-ID: <20160726051419-mutt-send-email-mst@kernel.org> References: <1469446584-14478-1-git-send-email-peterx@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1469446584-14478-1-git-send-email-peterx@redhat.com> Subject: Re: [Qemu-devel] [PATCH] x86: ioapic: upgrade emulated IOAPIC to ver 0x20 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Xu Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org, pbonzini@redhat.com On Mon, Jul 25, 2016 at 07:36:24PM +0800, Peter Xu wrote: > IOMMU IR and IOAPIC legacy devices (e.g., e1000) cannot work well > together with some old Linux kernels (upstream before v4.0, or any > released RHEL kernels). This patch fixes it. > > The problem is that: some old linux kernels (with IR enabled) only > support IOAPIC chips with version 0x20. New kernels after commit d32932d > ("x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces") > fixed this problem. To make sure we can work with even old kernels, > let's upgrade our IOAPIC to version 0x20. > > This patch is only useful when vIOMMU IR is enabled (which still do not > support kernel IOAPIC). So here we are only upgrading QEMU IOAPIC chip > to version 0x20. For kernel based IOAPIC, the version will still be > 0x11. > > Signed-off-by: Peter Xu As a minimum, we need to make sure not to change this for old machine types. Given the timing, limiting this for when IR is enabled would be a good idea I think. > --- > hw/intc/ioapic.c | 6 ++++++ > include/hw/i386/ioapic_internal.h | 3 ++- > 2 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c > index 2d3282a..361c37c 100644 > --- a/hw/intc/ioapic.c > +++ b/hw/intc/ioapic.c > @@ -354,6 +354,12 @@ ioapic_mem_write(void *opaque, hwaddr addr, uint64_t val, > } > } > break; > + case IOAPIC_EOI: > + if (size != 4) { > + break; > + } > + ioapic_eoi_broadcast(val); > + break; > } > > ioapic_update_kvm_routes(s); I'd add a code comment saying this is for 0x20 only. > diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h > index d89ea1b..9654a93 100644 > --- a/include/hw/i386/ioapic_internal.h > +++ b/include/hw/i386/ioapic_internal.h > @@ -29,7 +29,7 @@ > > #define MAX_IOAPICS 1 > > -#define IOAPIC_VERSION 0x11 > +#define IOAPIC_VERSION 0x20 > > #define IOAPIC_LVT_DEST_SHIFT 56 > #define IOAPIC_LVT_DEST_IDX_SHIFT 48 > @@ -71,6 +71,7 @@ > > #define IOAPIC_IOREGSEL 0x00 > #define IOAPIC_IOWIN 0x10 > +#define IOAPIC_EOI 0x40 > > #define IOAPIC_REG_ID 0x00 > #define IOAPIC_REG_VER 0x01 > -- > 2.4.11 >