From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39439) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSEsX-0002jk-Db for qemu-devel@nongnu.org; Tue, 26 Jul 2016 22:47:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bSEsU-0001lw-41 for qemu-devel@nongnu.org; Tue, 26 Jul 2016 22:47:24 -0400 Date: Wed, 27 Jul 2016 12:21:44 +1000 From: David Gibson Message-ID: <20160727022144.GV17429@voom.fritz.box> References: <1469571686-7284-1-git-send-email-benh@kernel.crashing.org> <1469571686-7284-18-git-send-email-benh@kernel.crashing.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="ZUxj+kVYsk1YKJSS" Content-Disposition: inline In-Reply-To: <1469571686-7284-18-git-send-email-benh@kernel.crashing.org> Subject: Re: [Qemu-devel] [PATCH 18/32] ppc: Don't update NIP in DCR access routines List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Benjamin Herrenschmidt Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org --ZUxj+kVYsk1YKJSS Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jul 27, 2016 at 08:21:12AM +1000, Benjamin Herrenschmidt wrote: > This is no longer necessary as the helpers will properly retrieve > the return address when needed Well, the helpers are only fixed in this patch IIUC. >=20 > Signed-off-by: Benjamin Herrenschmidt > --- > target-ppc/timebase_helper.c | 23 +++++++++++++---------- > target-ppc/translate.c | 12 ------------ > 2 files changed, 13 insertions(+), 22 deletions(-) >=20 > diff --git a/target-ppc/timebase_helper.c b/target-ppc/timebase_helper.c > index a07faa4..73363e0 100644 > --- a/target-ppc/timebase_helper.c > +++ b/target-ppc/timebase_helper.c > @@ -19,6 +19,7 @@ > #include "qemu/osdep.h" > #include "cpu.h" > #include "exec/helper-proto.h" > +#include "exec/exec-all.h" > #include "qemu/log.h" > =20 > /***********************************************************************= ******/ > @@ -143,15 +144,16 @@ target_ulong helper_load_dcr(CPUPPCState *env, targ= et_ulong dcrn) > =20 > if (unlikely(env->dcr_env =3D=3D NULL)) { > qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n"); > - helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, > - POWERPC_EXCP_INVAL | > - POWERPC_EXCP_INVAL_INVAL); > + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, > + POWERPC_EXCP_INVAL | > + POWERPC_EXCP_INVAL_INVAL, GETPC()); > } else if (unlikely(ppc_dcr_read(env->dcr_env, > (uint32_t)dcrn, &val) !=3D 0)) { > qemu_log_mask(LOG_GUEST_ERROR, "DCR read error %d %03x\n", > (uint32_t)dcrn, (uint32_t)dcrn); > - helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, > - POWERPC_EXCP_INVAL | POWERPC_EXCP_PRI= V_REG); > + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, > + POWERPC_EXCP_INVAL | > + POWERPC_EXCP_PRIV_REG, GETPC()); > } > return val; > } > @@ -160,14 +162,15 @@ void helper_store_dcr(CPUPPCState *env, target_ulon= g dcrn, target_ulong val) > { > if (unlikely(env->dcr_env =3D=3D NULL)) { > qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n"); > - helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, > - POWERPC_EXCP_INVAL | > - POWERPC_EXCP_INVAL_INVAL); > + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, > + POWERPC_EXCP_INVAL | > + POWERPC_EXCP_INVAL_INVAL, GETPC()); > } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn, > (uint32_t)val) !=3D 0)) { > qemu_log_mask(LOG_GUEST_ERROR, "DCR write error %d %03x\n", > (uint32_t)dcrn, (uint32_t)dcrn); > - helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, > - POWERPC_EXCP_INVAL | POWERPC_EXCP_PRI= V_REG); > + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, > + POWERPC_EXCP_INVAL | > + POWERPC_EXCP_PRIV_REG, GETPC()); > } > } > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index 84bcb09..f0e0ec6 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -5262,8 +5262,6 @@ static void gen_mfdcr(DisasContext *ctx) > TCGv dcrn; > =20 > CHK_SV; > - /* NIP cannot be restored if the memory exception comes from an help= er */ > - gen_update_nip(ctx, ctx->nip - 4); > dcrn =3D tcg_const_tl(SPR(ctx->opcode)); > gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_env, dcrn); > tcg_temp_free(dcrn); > @@ -5279,8 +5277,6 @@ static void gen_mtdcr(DisasContext *ctx) > TCGv dcrn; > =20 > CHK_SV; > - /* NIP cannot be restored if the memory exception comes from an help= er */ > - gen_update_nip(ctx, ctx->nip - 4); > dcrn =3D tcg_const_tl(SPR(ctx->opcode)); > gen_helper_store_dcr(cpu_env, dcrn, cpu_gpr[rS(ctx->opcode)]); > tcg_temp_free(dcrn); > @@ -5295,8 +5291,6 @@ static void gen_mfdcrx(DisasContext *ctx) > GEN_PRIV; > #else > CHK_SV; > - /* NIP cannot be restored if the memory exception comes from an help= er */ > - gen_update_nip(ctx, ctx->nip - 4); > gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_env, > cpu_gpr[rA(ctx->opcode)]); > /* Note: Rc update flag set leads to undefined state of Rc0 */ > @@ -5311,8 +5305,6 @@ static void gen_mtdcrx(DisasContext *ctx) > GEN_PRIV; > #else > CHK_SV; > - /* NIP cannot be restored if the memory exception comes from an help= er */ > - gen_update_nip(ctx, ctx->nip - 4); > gen_helper_store_dcr(cpu_env, cpu_gpr[rA(ctx->opcode)], > cpu_gpr[rS(ctx->opcode)]); > /* Note: Rc update flag set leads to undefined state of Rc0 */ > @@ -5322,8 +5314,6 @@ static void gen_mtdcrx(DisasContext *ctx) > /* mfdcrux (PPC 460) : user-mode access to DCR */ > static void gen_mfdcrux(DisasContext *ctx) > { > - /* NIP cannot be restored if the memory exception comes from an help= er */ > - gen_update_nip(ctx, ctx->nip - 4); > gen_helper_load_dcr(cpu_gpr[rD(ctx->opcode)], cpu_env, > cpu_gpr[rA(ctx->opcode)]); > /* Note: Rc update flag set leads to undefined state of Rc0 */ > @@ -5332,8 +5322,6 @@ static void gen_mfdcrux(DisasContext *ctx) > /* mtdcrux (PPC 460) : user-mode access to DCR */ > static void gen_mtdcrux(DisasContext *ctx) > { > - /* NIP cannot be restored if the memory exception comes from an help= er */ > - gen_update_nip(ctx, ctx->nip - 4); > gen_helper_store_dcr(cpu_env, cpu_gpr[rA(ctx->opcode)], > cpu_gpr[rS(ctx->opcode)]); > /* Note: Rc update flag set leads to undefined state of Rc0 */ --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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