From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48576) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bUZfa-0006dN-CX for qemu-devel@nongnu.org; Tue, 02 Aug 2016 09:23:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bUZfW-0003WF-7w for qemu-devel@nongnu.org; Tue, 02 Aug 2016 09:23:42 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:18229) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bUZfV-0003W6-V3 for qemu-devel@nongnu.org; Tue, 02 Aug 2016 09:23:38 -0400 Received: from pps.filterd (m0098394.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u72DEm7n073929 for ; Tue, 2 Aug 2016 09:23:37 -0400 Received: from e06smtp13.uk.ibm.com (e06smtp13.uk.ibm.com [195.75.94.109]) by mx0a-001b2d01.pphosted.com with ESMTP id 24grrb8bkx-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 02 Aug 2016 09:23:36 -0400 Received: from localhost by e06smtp13.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 2 Aug 2016 14:23:34 +0100 Received: from b06cxnps4074.portsmouth.uk.ibm.com (d06relay11.portsmouth.uk.ibm.com [9.149.109.196]) by d06dlp03.portsmouth.uk.ibm.com (Postfix) with ESMTP id 59C461B0805F for ; Tue, 2 Aug 2016 14:25:02 +0100 (BST) Received: from d06av02.portsmouth.uk.ibm.com (d06av02.portsmouth.uk.ibm.com [9.149.37.228]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u72DNW7Z23593274 for ; Tue, 2 Aug 2016 13:23:32 GMT Received: from d06av02.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id u72DNWtW014926 for ; Tue, 2 Aug 2016 07:23:32 -0600 Date: Tue, 2 Aug 2016 15:23:30 +0200 From: David Hildenbrand In-Reply-To: <20160802130432.GD3337@thinpad.lan.raisama.net> References: <1470139155-53900-1-git-send-email-dahi@linux.vnet.ibm.com> <1470139155-53900-2-git-send-email-dahi@linux.vnet.ibm.com> <20160802130432.GD3337@thinpad.lan.raisama.net> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Message-Id: <20160802152330.119f6892@thinkpad-w530> Subject: Re: [Qemu-devel] [Patch v1 01/29] qmp: details about CPU definitions in query-cpu-definitions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: qemu-devel@nongnu.org, jdenemar@redhat.com, imammedo@redhat.com, cornelia.huck@de.ibm.com, borntraeger@de.ibm.com, fiuczy@linux.vnet.ibm.com, mimu@linux.vnet.ibm.com > > # @name: the name of the CPU definition > > # > > +# @migration-safe: #optional whether a CPU definition can be safely used for > > +# migration in combination with a QEMU compatibility machine > > +# when migrating between different QMU versions and hosts. > > +# If not provided, information is not available. > > I would be more explicit about migration between different hosts. > I suggest "between different QEMU versions and between hosts with > different sets of (hardware or software) capabilities". Sounds good to me. > > Maybe we should make the "if not provided" case clearer. Maybe > "if not provided, information is not available and caller should > not assume the CPU model is migration-safe". We know that > existing libvirt x86 code assumes all CPU models (except "host") > are migration-safe, but it's better to advise people to not try > to make any assumptions in new code. Also sounds good to me. > > Later, we need to document somewhere that the "migratable" > property in "host" does not mean "migration-safe" (at least in > x86), because migration of "host" is safe only if the host > (software and hardware) capabilities are exactly the same. > Right, this will be a special case, also once we have that for s390x. > For reference: in x86, all CPU models except "host" are > migration-safe. Yes, that was my conclusion and that's also why I turned all s390x models (except host) into migration-safe models. Makes a lot of things easier to handle. > > > +# > > +# @static: #optional whether a CPU definition is static and will not change > > +# between QEMU versions / QEMU machines. A static model is always > > +# migration-safe. If not provided, information is not available. > > I assume static models don't change depending on the > machine-type, either. If that's case, we should document that. That's what I meant with "QEMU machines", should that be "QEMU machine types" instead? > > I believe in this case we don't need to make it optional: just > make the field always present and set it to "false" by default. That is true for x86, do you know about the other architectures (arm, ppc)? I'd like to avoid returning false information here for other architectures. Thanks Eduardo! David