From: David Gibson <david@gibson.dropbear.id.au>
To: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Cc: qemu-ppc@nongnu.org, rth@twiddle.net, qemu-devel@nongnu.org,
nikunj@linux.vnet.ibm.com, benh@kernel.crashing.org
Subject: Re: [Qemu-devel] [PATCH v3 2/5] target-ppc: add vector extract instructions
Date: Tue, 16 Aug 2016 14:21:35 +1000 [thread overview]
Message-ID: <20160816042135.GG14530@voom.fritz.box> (raw)
In-Reply-To: <1470901008-3284-3-git-send-email-raji@linux.vnet.ibm.com>
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On Thu, Aug 11, 2016 at 01:06:45PM +0530, Rajalakshmi Srinivasaraghavan wrote:
> The following vector extract instructions are added from ISA 3.0.
>
> vextractub - Vector Extract Unsigned Byte
> vextractuh - Vector Extract Unsigned Halfword
> vextractuw - Vector Extract Unsigned Word
> vextractd - Vector Extract Unsigned Doubleword
>
> Signed-off-by: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
> ---
> target-ppc/helper.h | 4 ++++
> target-ppc/int_helper.c | 26 ++++++++++++++++++++++++++
> target-ppc/translate/vmx-impl.c | 10 ++++++++++
> target-ppc/translate/vmx-ops.c | 10 +++++++---
> 4 files changed, 47 insertions(+), 3 deletions(-)
>
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index 0923779..59e7b88 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -250,6 +250,10 @@ DEF_HELPER_2(vspltisw, void, avr, i32)
> DEF_HELPER_3(vspltb, void, avr, avr, i32)
> DEF_HELPER_3(vsplth, void, avr, avr, i32)
> DEF_HELPER_3(vspltw, void, avr, avr, i32)
> +DEF_HELPER_3(vextractub, void, avr, avr, i32)
> +DEF_HELPER_3(vextractuh, void, avr, avr, i32)
> +DEF_HELPER_3(vextractuw, void, avr, avr, i32)
> +DEF_HELPER_3(vextractd, void, avr, avr, i32)
> DEF_HELPER_3(vinsertb, void, avr, avr, i32)
> DEF_HELPER_3(vinserth, void, avr, avr, i32)
> DEF_HELPER_3(vinsertw, void, avr, avr, i32)
> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> index 3f8e439..a917bd5 100644
> --- a/target-ppc/int_helper.c
> +++ b/target-ppc/int_helper.c
> @@ -1819,6 +1819,32 @@ VINSERT(h, u16, 3)
> VINSERT(w, u32, 1)
> VINSERT(d, u64, 0)
> #undef VINSERT
> +#if defined(HOST_WORDS_BIGENDIAN)
> +#define VEXTRACT(suffix, element, index) \
> + void helper_vextract##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \
splat is not a good parameter name here, since the element is being
extracted, rather than splatted.
> + { \
> + uint32_t s = sizeof(r->element[0]) * index; \
> + ppc_avr_t result = { .u64 = { 0, 0 } }; \
> + memcpy(&result.element[index], &b->u8[splat], \
> + sizeof(result.element[0])); \
> + *r = result; \
> + }
> +#else
> +#define VEXTRACT(suffix, element, index) \
> + void helper_vextract##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \
> + { \
> + ppc_avr_t result = { .u64 = { 0, 0 } }; \
> + uint32_t s = (16 - splat) - sizeof(r->element[0]); \
> + uint32_t d = (ARRAY_SIZE(r->element) - index) - 1;
> \
Same comments on the index value as for vinsert*.
> + memcpy(&result.element[d], &b->u8[s], sizeof(result.element[0])); \
> + *r = result; \
> + }
> +#endif
> +VEXTRACT(ub, u8, 7)
> +VEXTRACT(uh, u16, 3)
> +VEXTRACT(uw, u32, 1)
> +VEXTRACT(d, u64, 0)
> +#undef VEXTRACT
>
> #define VSPLTI(suffix, element, splat_type) \
> void helper_vspltis##suffix(ppc_avr_t *r, uint32_t splat) \
> diff --git a/target-ppc/translate/vmx-impl.c b/target-ppc/translate/vmx-impl.c
> index f6a97ac..766a645 100644
> --- a/target-ppc/translate/vmx-impl.c
> +++ b/target-ppc/translate/vmx-impl.c
> @@ -648,6 +648,10 @@ static void glue(gen_, name)(DisasContext *ctx) \
> GEN_VXFORM_UIMM(vspltb, 6, 8);
> GEN_VXFORM_UIMM(vsplth, 6, 9);
> GEN_VXFORM_UIMM(vspltw, 6, 10);
> +GEN_VXFORM_UIMM_SPLAT(vextractub, 6, 8, 15);
> +GEN_VXFORM_UIMM_SPLAT(vextractuh, 6, 9, 14);
> +GEN_VXFORM_UIMM_SPLAT(vextractuw, 6, 10, 12);
> +GEN_VXFORM_UIMM_SPLAT(vextractd, 6, 11, 8);
> GEN_VXFORM_UIMM_SPLAT(vinsertb, 6, 12, 15);
> GEN_VXFORM_UIMM_SPLAT(vinserth, 6, 13, 14);
> GEN_VXFORM_UIMM_SPLAT(vinsertw, 6, 14, 12);
> @@ -656,6 +660,12 @@ GEN_VXFORM_UIMM_ENV(vcfux, 5, 12);
> GEN_VXFORM_UIMM_ENV(vcfsx, 5, 13);
> GEN_VXFORM_UIMM_ENV(vctuxs, 5, 14);
> GEN_VXFORM_UIMM_ENV(vctsxs, 5, 15);
> +GEN_VXFORM_DUAL(vspltb, PPC_NONE, PPC2_ALTIVEC_207,
> + vextractub, PPC_NONE, PPC2_ISA300);
> +GEN_VXFORM_DUAL(vsplth, PPC_NONE, PPC2_ALTIVEC_207,
> + vextractuh, PPC_NONE, PPC2_ISA300);
> +GEN_VXFORM_DUAL(vspltw, PPC_NONE, PPC2_ALTIVEC_207,
> + vextractuw, PPC_NONE, PPC2_ISA300);
> GEN_VXFORM_DUAL(vspltisb, PPC_NONE, PPC2_ALTIVEC_207,
> vinsertb, PPC_NONE, PPC2_ISA300);
> GEN_VXFORM_DUAL(vspltish, PPC_NONE, PPC2_ALTIVEC_207,
> diff --git a/target-ppc/translate/vmx-ops.c b/target-ppc/translate/vmx-ops.c
> index ca69e56..aafe70b 100644
> --- a/target-ppc/translate/vmx-ops.c
> +++ b/target-ppc/translate/vmx-ops.c
> @@ -197,6 +197,13 @@ GEN_VXRFORM_DUAL(vcmpbfp, vcmpgtsd, 3, 15, PPC_ALTIVEC, PPC_NONE)
> #define GEN_VXFORM_DUAL_INV(name0, name1, opc2, opc3, inval0, inval1, type) \
> GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, \
> PPC_NONE)
> +GEN_VXFORM_DUAL_INV(vspltb, vextractub, 6, 8, 0x00000000, 0x100000,
> + PPC2_ALTIVEC_207),
> +GEN_VXFORM_DUAL_INV(vsplth, vextractuh, 6, 9, 0x00000000, 0x100000,
> + PPC2_ALTIVEC_207),
> +GEN_VXFORM_DUAL_INV(vspltw, vextractuw, 6, 10, 0x00000000, 0x100000,
> + PPC2_ALTIVEC_207),
> +GEN_VXFORM_300_EXT(vextractd, 6, 11, 0x100000),
> GEN_VXFORM_DUAL_INV(vspltisb, vinsertb, 6, 12, 0x00000000, 0x100000,
> PPC2_ALTIVEC_207),
> GEN_VXFORM_DUAL_INV(vspltish, vinserth, 6, 13, 0x00000000, 0x100000,
> @@ -226,9 +233,6 @@ GEN_VXFORM_NOA(vrfiz, 5, 9),
>
> #define GEN_VXFORM_UIMM(name, opc2, opc3) \
> GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC)
> -GEN_VXFORM_UIMM(vspltb, 6, 8),
> -GEN_VXFORM_UIMM(vsplth, 6, 9),
> -GEN_VXFORM_UIMM(vspltw, 6, 10),
> GEN_VXFORM_UIMM(vcfux, 5, 12),
> GEN_VXFORM_UIMM(vcfsx, 5, 13),
> GEN_VXFORM_UIMM(vctuxs, 5, 14),
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2016-08-16 4:45 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-11 7:36 [Qemu-devel] [PATCH v3 0/5] POWER9 TCG enablement - part3 Rajalakshmi Srinivasaraghavan
2016-08-11 7:36 ` [Qemu-devel] [PATCH v3 1/5] target-ppc: add vector insert instructions Rajalakshmi Srinivasaraghavan
2016-08-16 4:18 ` David Gibson
2016-08-19 5:46 ` Rajalakshmi Srinivasaraghavan
2016-08-23 15:08 ` David Gibson
2016-08-11 7:36 ` [Qemu-devel] [PATCH v3 2/5] target-ppc: add vector extract instructions Rajalakshmi Srinivasaraghavan
2016-08-16 4:21 ` David Gibson [this message]
2016-08-11 7:36 ` [Qemu-devel] [PATCH v3 3/5] target-ppc: add vector count trailing zeros instructions Rajalakshmi Srinivasaraghavan
2016-08-16 4:46 ` David Gibson
2016-08-11 7:36 ` [Qemu-devel] [PATCH v3 4/5] target-ppc: add vector bit permute doubleword instruction Rajalakshmi Srinivasaraghavan
2016-08-16 4:33 ` David Gibson
2016-08-11 7:36 ` [Qemu-devel] [PATCH v3 5/5] target-ppc: add vector permute right indexed instruction Rajalakshmi Srinivasaraghavan
2016-08-16 4:45 ` David Gibson
2016-08-16 10:14 ` Rajalakshmi Srinivasaraghavan
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